Simone Secchi

27 papers B 3C 3Misc 1Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2019 J jnl
A Note on Sign-Changing Solutions to the NLS on the Double-Bridge Graph.
Symmetry
Diego Noja, Sergio Rolando, Simone Secchi
2017 J jnl
Exploring Efficient Hardware Support for Applications with Irregular Memory Patterns on Multinode Manycore Architectures.
IEEE Trans. Parallel Distributed Syst.
Marco Ceriani, Simone Secchi, Oreste Villa, Antonino Tumeo, Gianluca Palermo
2015 J jnl
Special Issue on Architectures and Algorithms for Irregular Applications (AAIA) - Guest editors' introduction.
J. Parallel Distributed Comput.
Antonino Tumeo, John Feo, Oreste Villa, Simone Secchi, Timothy G. Mattson
2013 — conf
A runtime adaptive H.264 video-decoding MPSoC platform.
DASIP
Giuseppe Tuveri, Simone Secchi, Paolo Meloni, Luigi Raffo, Emanuele Cannella
2013 Misc conf
Exploring Manycore Multinode Systems for Irregular Applications with FPGA Prototyping.
FCCM
Marco Ceriani, Gianluca Palermo, Simone Secchi, Antonino Tumeo, Oreste Villa
2013 — conf
Exploring hardware support for scaling irregular applications on multi-node multi-core architectures.
ASAP
Simone Secchi, Marco Ceriani, Antonino Tumeo, Oreste Villa, Gianluca Palermo, Luigi Raffo
2013 — conf
Exploring manycore multinode systems for irregular applications with FPGA prototyping.
Hot Chips Symposium
Marco Ceriani, Simone Secchi, Antonino Tumeo, Oreste Villa, Gianluca Palermo
2013 — ed.
Proceedings of the 3rd Workshop on Irregular Applications - Architectures and Algorithms, IA
IA3
Antonino Tumeo, John Feo, Oreste Villa, Simone Secchi
2013 — conf
Prototyping hardware support for irregular applications.
RAPIDO
Marco Ceriani, Simone Secchi, Antonino Tumeo, Oreste Villa
2012 B conf
A Bandwidth-Optimized Multi-core Architecture for Irregular Applications.
CCGRID
Simone Secchi, Antonino Tumeo, Oreste Villa
2012 J jnl
Designing Next-Generation Massively Multithreaded Architectures for Irregular Applications.
Computer
Antonino Tumeo, Simone Secchi, Oreste Villa
2012 C conf
Efficient Sorting on the Tilera Manycore Architecture.
SBAC-PAD
Alessandro Morari, Antonino Tumeo, Oreste Villa, Simone Secchi, Mateo Valero
2012 J jnl
Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.
VLSI Design
Paolo Meloni, Sebastiano Pomata, Giuseppe Tuveri, Simone Secchi, Luigi Raffo, Menno Lindwer
2012 J jnl
Fast and Accurate Simulation of the Cray XMT Multithreaded Supercomputer.
IEEE Trans. Parallel Distributed Syst.
Oreste Villa, Antonino Tumeo, Simone Secchi, Joseph B. Manzano
2011 B conf
Contention Modeling for Multithreaded Distributed Shared Memory Machines: The Cray XMT.
CCGRID
Simone Secchi, Antonino Tumeo, Oreste Villa
2011 — conf
Experiences with String Matching on the Fermi Architecture.
ARCS
Antonino Tumeo, Simone Secchi, Oreste Villa
2011 — conf
Irregular applications: architectures & algorithms.
IA3@SC
John Feo, Oreste Villa, Antonino Tumeo, Simone Secchi
2011 — ed.
Proceedings of the first workshop on Irregular applications: architectures and algorithm, IA3 2011, Seattle, WA, USA, November 13, 2011
IA3@SC
John Feo, Oreste Villa, Antonino Tumeo, Simone Secchi
2011 — conf
Towards efficient execution of irregular applications: panel outline.
IA3@SC
John Feo, Oreste Villa, Antonino Tumeo, Simone Secchi
2010 J jnl
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures.
IEEE Embed. Syst. Lett.
Paolo Meloni, Simone Secchi, Luigi Raffo
2010 C conf
Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper.
VLSI-SoC
Paolo Meloni, Simone Secchi, Luigi Raffo
2010 B conf
Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures.
ISPASS
Simone Secchi, Paolo Meloni, Luigi Raffo
2010 — conf
Self organization on a swarm computing fabric: a new way to look at fault tolerance.
Conf. Computing Frontiers
Danilo Pani, Simone Secchi, Luigi Raffo
2008 C conf
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching.
DSD
Simone Secchi, Francesca Palumbo, Danilo Pani, Luigi Raffo
2008 — conf
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs.
SAMOS
Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo
2007 — ch.
A Surface Tension and Coalescence Model for Dynamic Distributed Resources Allocation in Massively Parallel Processors on-Chip.
NICSO
Francesca Palumbo, Danilo Pani, Luigi Raffo, Simone Secchi
2004 J jnl
Interior spikes of a singularly perturbed Neumann problem with potentials.
Appl. Math. Lett.
A. Pomponio, Simone Secchi