Simone Casale Brunet

48 papers B 2C 3Misc 12Journal 7Unranked 24

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Exploring the data of blockchain-based metaverses. MetaCom Simone Casale Brunet, Marco Mattavelli, Leonardo Chiariglione
2021	—	`conf`	Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms. MCSoC Aurelien Bloch, Simone Casale Brunet, Marco Mattavelli
2021	—	`conf`	SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis. MCSoC Aurelien Bloch, Simone Casale Brunet, Marco Mattavelli
2020	J	`jnl`	Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs. J. Signal Process. Syst. Anatoly Prihozhy, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2019	Misc	`conf`	An Heterogeneous Compiler of Dataflow Programs for Zynq Platforms. ICASSP Endri Bezati, Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli
2018	—	`conf`	Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines. SiPS Anatoly Prihozhy, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2018	J	`jnl`	Execution Trace Graph of Dataflow Process Networks. IEEE Trans. Multi Scale Comput. Syst. Simone Casale Brunet, Marco Mattavelli
2018	J	`jnl`	High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs. IEEE Trans. Multi Scale Comput. Syst. Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2018	—	`conf`	Shared-variable Synchronization Approaches for Dynamic Data Flow Programs. SiPS Apostolos Modas, Simone Casale Brunet, Robert J. Stewart, Endri Bezati, Junaid Jameel Ahmad, Marco Mattavelli
2018	B	`conf`	Towards in the Field Fast Pathogens Detection Using FPGAs. FPL Simone Casale Brunet, Thierry Schüpbach, Nicolas Guex, Christian Iseli, Alan J. Bridge, Dmitry Kuznetsov, Christian J. A. Sigrist, Phillippe Lemercier, Ioannis Xenarios, Endri Bezati
2017	—	`conf`	Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms. EUSIPCO Malgorzata Michalska, Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2017	J	`jnl`	Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Endri Bezati, Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck
2017	—	`conf`	Design space exploration of dataflow-based Smith-Waterman FPGA implementations. SiPS Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2017	Misc	`conf`	Execution trace graph based interface synthesis of signal processing dataflow programs for heterogeneous MPSoCs. ACSSC Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2017	Misc	`conf`	High level synthesis of Smith-Waterman dataflow implementations. ICASSP Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2017	Misc	`conf`	Profiling of dynamic dataflow programs on MPSoC multi-core architectures. ACSSC Simone Casale Brunet, Endri Bezati, Aurelien Bloch, Marco Mattavelli
2016	Misc	`conf`	A Partition Scheduler Model for Dynamic Dataflow Programs. ICCS Malgorzata Michalska, Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2016	J	`jnl`	Automated Design Flow for Multi-Functional Dataflow-Based Platforms. J. Signal Process. Syst. Carlo Sau, Paolo Meloni, Luigi Raffo, Francesca Palumbo, Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2016	J	`jnl`	Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques - Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies. J. Signal Process. Syst. Massimo Canale, Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Jörn W. Janneck
2016	—	`conf`	High-Precision Performance Estimation of Dynamic Dataflow Programs. MCSoC Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2016	—	`conf`	High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms. SAMOS Endri Bezati, Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck
2016	Misc	`conf`	High-level system synthesis and optimization of dataflow programs for MPSoCs. ACSSC Endri Bezati, Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck
2016	—	`conf`	Performance estimation of program partitions on multi-core platforms. PATMOS Malgorzata Michalska, J. J. Ahmad, Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2016	—	`conf`	Programming Models and Methods for Heterogeneous Parallel Embedded Systems. MCSoC Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2016	Misc	`conf`	Trace-based manycore partitioning of stream-processing applications. ACSSC Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Jörn W. Janneck
2015	Misc	`conf`	Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs. ICCS Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2014	Misc	`conf`	A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations. ICASSP Ab Al-Hadi Ab Rahman, Simone Casale Brunet, Claudio Alberti, Marco Mattavelli
2014	—	`conf`	Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case. ICSAMOS Carlo Sau, Luigi Raffo, Francesca Palumbo, Endri Bezati, Simone Casale Brunet, Marco Mattavelli
2014	—	`conf`	Characterizing communication behavior of dataflow programs using trace analysis. ICSAMOS Jörn W. Janneck, Simone Casale Brunet, Marco Mattavelli
2014	Misc	`conf`	Dataflow machines. ACSSC Jörn W. Janneck, Gustav Cedersjö, Endri Bezati, Simone Casale Brunet
2014	—	`conf`	Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling. SiPS Massimo Canale, Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Jörn W. Janneck
2014	—	`conf`	Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control. DASIP Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Massimo Canale, Jörn W. Janneck
2014	B	`conf`	Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms. ICIP Damien de Saint Jorre, Claudio Alberti, Marco Mattavelli, Simone Casale Brunet
2014	—	`conf`	TURNUS: An open-source design space exploration framework for dynamic stream programs. DASIP Simone Casale Brunet, M. Wiszniewska, Endri Bezati, Marco Mattavelli, Jörn W. Janneck, Massimo Canale
2013	—	`conf`	A Lego Mindstorms NXT experiment for Model Predictive Control education. ECC Massimo Canale, Simone Casale Brunet
2013	C	`conf`	Buffer optimization based on critical path analysis of a dataflow program design. ISCAS Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck
2013	—	`conf`	Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study. DASIP Ab Al-Hadi Ab Rahman, Simone Casale Brunet, Claudio Alberti, Marco Mattavelli
2013	—	`conf`	Design space exploration and implementation of RVC-CAL applications using the TURNUS framework. DASIP Simone Casale Brunet, Endri Bezati, Claudio Alberti, Ghislain Roquier, Marco Mattavelli, Jörn W. Janneck, Jani Boutellier
2013	C	`conf`	Design space exploration of high level stream programs on parallel architectures: A focus on the buffer size minimization and optimization problem. ISPA Simone Casale Brunet, Claudio Alberti, Marco Mattavelli, Jörn W. Janneck
2013	J	`jnl`	Methods to explore design space for MPEG RMC codec specifications. Signal Process. Image Commun. Simone Casale Brunet, Abdallah Elguindy, Endri Bezati, Richard Thavot, Ghislain Roquier, Marco Mattavelli, Jörn W. Janneck
2013	Misc	`conf`	Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications. ACSSC Simone Casale Brunet, Endri Bezati, Claudio Alberti, Marco Mattavelli, Edoardo Amaldi, Jörn W. Janneck
2013	—	`conf`	Partitioning and optimization of high level stream applications for multi clock domain architectures. SiPS Simone Casale Brunet, Endri Bezati, Claudio Alberti, Marco Mattavelli, Edoardo Amaldi, Jörn W. Janneck
2013	—	`conf`	Representing Guard Dependencies in Dataflow Execution Traces. CICSyN Simone Casale Brunet, Marco Mattavelli, Claudio Alberti, Jörn W. Janneck
2013	Misc	`conf`	Systems design space exploration by serial dataflow program execution. ACSSC Simone Casale Brunet, Marco Mattavelli, Claudio Alberti, Jörn W. Janneck
2013	C	`conf`	TURNUS: A design exploration framework for dataflow system design. ISCAS Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck
2013	—	`conf`	Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems. DASIP Simone Casale Brunet, Claudio Alberti, Marco Mattavelli, Jörn W. Janneck
2012	—	`conf`	Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program. DASIP Ab Al-Hadi Ab Rahman, Richard Thavot, Simone Casale Brunet, Endri Bezati, Marco Mattavelli
2012	—	`conf`	Profiling of Dataflow Programs Using Post Mortem Causation Traces. SiPS Simone Casale Brunet, Marco Mattavelli, Jörn W. Janneck