Simon Tam

13 papers A 1Misc 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2015 J jnl
Low-Cost On-Chip Clock Jitter Measurement Scheme.
IEEE Trans. Very Large Scale Integr. Syst.
Martin Omaña, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Asifur Rahman, Simon Tam
2013 J jnl
Active Filter-Based Hybrid On-Chip DC-DC Converter for Point-of-Load Voltage Regulation.
IEEE Trans. Very Large Scale Integr. Syst.
Selçuk Köse, Simon Tam, Sally Pinzon, Bruce McDermott, Eby G. Friedman
2012 J jnl
New Design for Testability Approach for Clock Fault Testing.
IEEE Trans. Computers
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2011 J jnl
Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors.
IEEE Trans. Very Large Scale Integr. Syst.
Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam
2010 — conf
On-die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter.
DFT
Martin Omaña, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Simon Tam, Asifur Rahman
2008 — conf
Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors.
DFT
Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam
2007 Misc conf
Novel Approach to Clock Fault Testing for High Performance Microprocessors.
VTS
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2007 A conf
Novel compensation scheme for local clocks of high performance microprocessors.
ITC
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2006 — conf
Clock Generation and Distribution of a Dual-Core Xeon Processor with 16MB L3 Cache.
ISSCC
Simon Tam, Justin Leung, Rahul Dilip Limaye, Sam Choy, Sujal Vora, Mitsuhiro Adachi
2005 J jnl
A 130-nm triple-V
IEEE J. Solid State Circuits
Jonathan Chang, Stefan Rusu, Jonathan Shoemaker, Simon Tam, Ming Huang, Mizan Haque, Siufu Chiu, Kevin Truong, Mesbah Karim, Gloria Leong, Kiran Desai, Richard Goe, Sandhya Kulkarni
2004 J jnl
Clock generation and distribution for the 130-nm Itanium
IEEE J. Solid State Circuits
Simon Tam, Rahul Dilip Limaye, Utpal Nagarji Desai
2003 J jnl
A 1.5-GHz 130-nm Itanium® 2 Processor with 6-MB on-die L3 cache.
IEEE J. Solid State Circuits
Stefan Rusu, Jason Stinson, Simon Tam, Justin Leung, Harry Muljono, Brian S. Cherkauer
2000 J jnl
Clock generation and distribution for the first IA-64 microprocessor.
IEEE J. Solid State Circuits
Simon Tam, Stefan Rusu, Utpal Nagarji Desai, Robert Kim, Ji Zhang, Ian Young