Simon J. Hollis

23 papers A 2C 1Misc 1Journal 16Unranked 3
YearRankTypeTitle / Venue / Authors
2019 J jnl
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dawei Liu, Simon J. Hollis, Bernard H. Stark
2016 J jnl
Design of 370-ps Delay Floating-Voltage Level Shifters With 30-V/ns Power Supply Slew Tolerance.
IEEE Trans. Circuits Syst. II Express Briefs
Dawei Liu, Simon J. Hollis, Harry C. P. Dymond, Neville McNeill, Bernard H. Stark
2016 A conf
Swallow: Building an energy-transparent many-core embedded real-time system.
DATE
Simon J. Hollis, Steve Kerrison
2016 C conf
nOS: A nano-sized distributed operating system for many-core embedded systems.
ICCD
Simon J. Hollis, Edward Ma, Radu Marculescu
2015 J jnl
Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms.
Comput. J.
James Pallister, Simon J. Hollis, Jeremy Bennett
2015 A conf
Optimizing the flash-RAM energy trade-off in deeply embedded systems.
CGO
James Pallister, Kerstin Eder, Simon J. Hollis
2015 J jnl
Overview of Swallow - A Scalable 480-core System for Investigating the Performance and Energy Efficiency of Many-core Applications and Operating Systems.
CoRR
Simon J. Hollis, Steve Kerrison
2014 Misc conf
A high-level model of embedded flash energy consumption.
CASES
James Pallister, Kerstin Eder, Simon J. Hollis, Jeremy Bennett
2014 J jnl
A high-level model of embedded flash energy consumption.
CoRR
James Pallister, Kerstin Eder, Simon J. Hollis, Jeremy Bennett
2014 J jnl
Challenges for Energy Harvesting Systems Under Intermittent Excitation.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Guang Yang, Bernard H. Stark, Simon J. Hollis, Stephen G. Burrow
2014 J jnl
Exploiting Emergence in On-Chip Interconnects.
IEEE Trans. Computers
Simon J. Hollis, Chris Jackson, Paul Bogdan, Radu Marculescu
2014 J jnl
Optimizing the flash-RAM energy trade-off in deeply embedded systems.
CoRR
James Pallister, Kerstin Eder, Simon J. Hollis
2014 J jnl
eXtended Torus routing algorithm for networks-on-chip: a routing algorithm for dynamically reconfigurable networks-on-chip.
IET Comput. Digit. Tech.
Arash Beldachi, Simon J. Hollis, José L. Núñez-Yáñez
2013 J jnl
BEEBS: Open Benchmarks for Energy Measurements on Embedded Platforms.
CoRR
James Pallister, Simon J. Hollis, Jeremy Bennett
2013 J jnl
Identifying Compiler Options to Minimise Energy Consumption for Embedded Platforms
CoRR
James Pallister, Simon J. Hollis, Jeremy Bennett
2012 J jnl
Emulating a large memory sequential machine with a collection of small memory ones
CoRR
James W. Hanlon, Simon J. Hollis, David May
2012 J jnl
Scalable data abstractions for distributed parallel computations
CoRR
James W. Hanlon, Simon J. Hollis, David May
2011 J jnl
A deadlock-free routing algorithm for dynamically reconfigurable Networks-on-Chip.
Microprocess. Microsystems
Chris Jackson, Simon J. Hollis
2011 J jnl
Fast Distributed Process Creation with the XMOS XS1 Architecture
CoRR
James W. Hanlon, Simon J. Hollis
2011 — conf
Fast Distributed Process Creation with the XMOS XS1 Architecture.
CPA
James W. Hanlon, Simon J. Hollis
2011 J jnl
Implementation and Evaluation of Skip-Links: A Dynamically Reconfiguring Topology for Energy-Efficient NoCs.
Int. J. Embed. Real Time Commun. Syst.
Simon J. Hollis, Chris Jackson
2010 — conf
Skip-links: A dynamically reconfiguring topology for energy-efficient NoCs.
SoC
Chris Jackson, Simon J. Hollis
2009 — conf
When does Network-on-Chip bypassing make sense?
SoCC
Simon J. Hollis, Chris Jackson