Simon Haene

12 papers C 5Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2010 J jnl
Simulation and Emulation of MIMO Wireless Baseband Transceivers.
EURASIP J. Wirel. Commun. Netw.
Pierre Greisen, Simon Haene, Andreas Burg
2008 J jnl
A Real-Time 4-Stream MIMO-OFDM Transceiver: System Design, FPGA Implementation, and Characterization.
IEEE J. Sel. Areas Commun.
Simon Haene, David Perels, Andreas Burg
2007 — conf
A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication.
CICC
Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2007 C conf
FFT Processor for OFDM Channel Estimation.
ISCAS
Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2007 C conf
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation.
ISCAS
Andreas Burg, Simon Haene, Wolfgang Fichtner, Markus Rupp
2007 — conf
System-level characterization of a real-time 4×4 MIMO-OFDM transceiver on FPGA.
EUSIPCO
Simon Haene, David Perels, Wolfgang Fichtner
2007 C conf
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition.
ISCAS
Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner
2006 — conf
A Frame-Start Detector for a 4×4 MIMO-OFDM System.
ICASSP (4)
David Perels, Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2006 C conf
Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems.
ISCAS
Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2006 C conf
Silicon implementation of an MMSE-based soft demapper for MIMO-BICM.
ISCAS
Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2005 — conf
ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs.
ESSCIRC
David Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei
2004 — conf
Towards an AES crypto-chip resistant to differential power analysis.
ESSCIRC
Norbert Pramstaller, Frank K. Gürkaynak, Simon Haene, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner