Silvia M. Müller

29 papers A* 1B 1C 4Journal 8Unranked 11

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	HERMES-Core - A 1.59-TOPS/mm IEEE J. Solid State Circuits Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Brändli, Feng Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
2021	A*	`conf`	Energy Efficiency Boost in the AI-Infused POWER10 Processor. ISCA Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose
2021	—	`conf`	HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. VLSI Circuits Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Braendli, Femg Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
2020	J	`jnl`	Design of the IBM z15 microprocessor. IBM J. Res. Dev. Anthony Saporito, Martin Recktenwald, Christian Jacobi, Gerrit Koch, Deanna Postles Dunn Berger, Robert J. Sonnelitter, Craig R. Walters, Jang-Soo Lee, Cédric Lichtenau, Ulrich Mayer, Eduard Herkel, Stefan Payer, Silvia M. Müller, Vesselina K. Papazova, Ekaterina M. Ambroladze, Timothy C. Bronson
2020	—	`conf`	Novel hardware & software design for mathematical and AI acceleration. CASCON Robert F. Enenkel, Silvia M. Müller, Christopher K. Anand
2014	—	`book`	A Pipelined Multi-core MIPS Machine - Hardware Implementation and Correctness Proof. Mikhail Kovalev, Silvia M. Müller, Wolfgang J. Paul
2011	C	`conf`	The IBM zEnterprise-196 Decimal Floating-Point Accelerator. IEEE Symposium on Computer Arithmetic Steven R. Carlough, Adam Collura, Silvia M. Müller, Michael Kroener
2011	C	`conf`	The POWER7 Binary Floating-Point Unit. IEEE Symposium on Computer Arithmetic Maarten Boersma, Michael Kroener, Christophe Layer, Petra Leber, Silvia M. Müller, Kerstin Schelm
2007	J	`jnl`	IBM POWER6 accelerators: VMX and DFU. IBM J. Res. Dev. Lee Eisen, John Wesley Ward III, Hans-Werner Tast, Nicolas Mäding, Jens Leenstra, Silvia M. Müller, Christian Jacobi, Jochen Preiss, Eric M. Schwarz, Steven R. Carlough
2007	J	`jnl`	Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI. IBM J. Res. Dev. Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia M. Müller, Osamu Takahashi, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Shoji Onishi, Juergen Pille, Joel Silberman, Suksoon Yong, Akiyuki Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, Vandung To, Eiji Iwata
2006	J	`jnl`	A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor. IEEE J. Solid State Circuits Hwa-Joon Oh, Silvia M. Müller, Christian Jacobi, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong
2005	C	`conf`	Pain versus Gain in the Hardware Design of FPUs and Supercomputers. IEEE Symposium on Computer Arithmetic Roger A. Golliver, Silvia M. Müller, Stuart F. Oberman, Martin S. Schmookler, Debjit Das Sarma, Andrew Beaumont-Smith
2005	C	`conf`	The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor. IEEE Symposium on Computer Arithmetic Silvia M. Müller, Christian Jacobi, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong
2000	J	`jnl`	A dual precision IEEE floating-point multiplier. Integr. Guy Even, Silvia M. Müller, Peter-Michael Seidel
2000	—	`book`	Computer architecture - complexity and correctness. Silvia M. Müller, Wolfgang J. Paul
2000	—	`conf`	Parallel Computer Architecture. Euro-Par Silvia M. Müller, Per Stenström, Mateo Valero, Stamatis Vassiliadis
2000	—	`conf`	Proving the Correctness of Pipelined Micro-Architectures. MBMV Daniel Kröning, Wolfgang J. Paul, Silvia M. Müller
1999	—	`conf`	A Hardware Scheduler for Controlling Variable Latency Functional Units. Applied Informatics Silvia M. Müller
1999	B	`conf`	On the Scheduling of Variable Latency Functional Units. SPAA Silvia M. Müller
1999	—	`conf`	The Impact of Hardware Scheduling Mechanismus on the Performance and Cost of Processor Designs. ARCS Silvia M. Müller, Holger W. Leister, Peter Dell, Nikolaus Gerteis, Daniel Kroening
1998	J	`jnl`	On the Correctness of Hardware Scheduling Mechanisms for Out-of-Order Execution. J. Circuits Syst. Comput. Silvia M. Müller, Wolfgang J. Paul
1997	—	`conf`	Conflict-Free Access to Multiple Single-Ported Register Files. IPPS Silvia M. Müller, Uzi Vishkin
1996	—	`conf`	Making the Original Scoreboard Mechanism Deadlock Free. ISTCS Silvia M. Müller, Wolfgang J. Paul
1995	—	`book`	The Complexity of Simple Computer Architectures Silvia M. Müller, Wolfgang J. Paul
1994	—	`conf`	Efficient mapping of randomly sparse neural networks on parallel vector supercomputers. SPDP Silvia M. Müller, Benedict Gomes
1994	—	`ch.`	Isolating the Reasons for the Performance of Parallel Machines on Numerical Programs. Automatic Parallelization Arno Formella, Silvia M. Müller, Wolfgang J. Paul, Anke Bingert
1991	J	`jnl`	A method to parallelize tridiagonal solvers. Parallel Comput. Silvia M. Müller, Dieter Scheerer
1989	—	`conf`	Contributions of Theoretical Computer Science, Applied Computer Science and Numerical Mathematics to the Design of Parallel Computers. IFIP Congress Silvia M. Müller, Wolfgang J. Paul
1988	—	`conf`	Implementierung eines informationstheoretischen Ansatzes zur Bilderkennung. Innovative Informations-Infrastrukturen P. Bergmann, Jörg Keller, Thomas Malter, Silvia M. Müller, Wolfgang J. Paul, Thorsten Pöschel, O. Schlüter, Lothar Thiele