Sifan Sun

15 papers A* 1A 1Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 40 nm Buffer-Free 7T-SRAM Analog Charge-Domain CIM Macro With Merging Timing Based On Time-Row Division Strategy.
IEEE Trans. Very Large Scale Integr. Syst.
Linjun Jiang, Jianxin Wu, Sifan Sun, Changyu Li, Wang Kang, He Zhang
2025 — conf
A 24.65 TOPS/W@INT8 Hybrid Analog-Digital Multi-core SRAM CIM Macro with Optimal Weight Dividing and Resource Allocation Strategies.
ASP-DAC
Yitong Zhou, Wente Yi, Sifan Sun, Wenjia Wang, Jinyu Bai, He Zhang, Wang Kang
2025 J jnl
A Self-Decryption Pass Transistor Logic-Based In-MRAM Computing Macro Using Hybrid VGSOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Jiye Yao, Yulong Qiu, Chao Wang, Zhaohao Wang, Ke Zhang, Amara Amara, Xiaoyang Lin, Weisheng Zhao
2025 A* conf
Efficient Weight Mapping and Resource Scheduling on Crossbar-based Multi-core CIM Systems.
DAC
Hanjie Liu, Sifan Sun, Aifei Zhang, Haiyan Qin, Yutong Wu, Minhao Gu, Shihang Fu, Shuaikai Liu, Baosen Liu, Wang Kang
2025 J jnl
HiT-CIM: A High-Throughput Compute-in-Memory SRAM Architecture With Simultaneous Weight Loading/Computing and Balance Capabilities.
IEEE Trans. Emerg. Top. Comput.
Junzhan Liu, Sifan Sun, Liang Zhang, Lichuan Luo, Liang Ran, He Zhang, Wang Kang, Weisheng Zhao
2025 J jnl
In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. II Express Briefs
Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Daming Zhou, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao
2025 J jnl
Model quantization for computing-in-memory: a survey.
Sci. China Inf. Sci.
Sifan Sun, Jinyu Bai, Hanting Chen, Kaiwen Deng, Zhiwei Xie, Jingjing Li, Bin Cao, He Zhang, Wang Kang, Weisheng Zhao
2024 J jnl
CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory-Based Neural Network Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jinyu Bai, Sifan Sun, Weisheng Zhao, Wang Kang
2024 J jnl
CIM²PQ: An Arraywise and Hardware-Friendly Mixed Precision Quantization Method for Analog Computing-In-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sifan Sun, Jinyu Bai, Zhaoyu Shi, Weisheng Zhao, Wang Kang
2023 — conf
An In-Memory-Computing STT-MRAM Macro with Analog ReLU and Pooling Layers for Ultra-High Efficient Neural Network.
NVMSA
Linjun Jiang, Sifan Sun, Jinming Ge, He Zhang, Wang Kang
2023 — conf
ES-MPQ: Evolutionary Search Enabled Mixed Precision Quantization Framework for Computing-in-Memory.
NVMSA
Sifan Sun, Jinming Ge, Jinyu Bai, Wang Kang
2023 — conf
Exploring Bit-Level Sparsity for Partial Sum Quantization in Computing-In-Memory Accelerator.
NVMSA
Jinyu Bai, Sifan Sun, Wang Kang
2023 A conf
Hierarchical Non-Structured Pruning for Computing-In-Memory Accelerators with Reduced ADC Resolution Requirement.
DATE
Wenlu Xue, Jinyu Bai, Sifan Sun, Wang Kang
2023 J jnl
Partial Sum Quantization for Computing-In-Memory-Based Neural Network Accelerator.
IEEE Trans. Circuits Syst. II Express Briefs
Jinyu Bai, Wenlu Xue, Yunqian Fan, Sifan Sun, Wang Kang
2021 — conf
Tiny neural network search and implementation for embedded FPGA: a software-hardware co-design approach.
A-SSCC
Jinyu Bai, Yunqian Fan, Sifan Sun, Wang Kang, Weisheng Zhao