Sidharta Andalam

35 papers A* 3A 4C 4Misc 2Journal 15Unranked 7
YearRankTypeTitle / Venue / Authors
2021 J jnl
Challenges in Digital Twin Development for Cyber-Physical Production Systems.
CoRR
HeeJong Park, Arvind Easwaran, Sidharta Andalam
2020 J jnl
CLAIR: A Contract-based Framework for Developing Resilient CPS Architectures.
CoRR
Sidharta Andalam, Daniel Jun Xian Ng, Arvind Easwaran, Karthik Thangamariappan
2020 J jnl
Contract-based Methodology for Developing Resilient Cyber-Infrastructure in the Industry 4.0 Era.
CoRR
Sidharta Andalam, Daniel Jun Xian Ng, Arvind Easwaran, Karthik Thangamariappan
2020 J jnl
Demo Abstract: Contract-based Hierarchical Resilience Framework for Cyber-Physical Systems.
CoRR
Daniel Jun Xian Ng, Arvind Easwaran, Sidharta Andalam
2020 J jnl
TiLA: Twin-in-the-Loop Architecture for Cyber-Physical Production Systems.
CoRR
HeeJong Park, Arvind Easwaran, Sidharta Andalam
2019 J jnl
Contract-Based Methodology for Developing Resilient Cyber-Infrastructure in the Industry 4.0 Era.
IEEE Embed. Syst. Lett.
Sidharta Andalam, Daniel Jun Xian Ng, Arvind Easwaran, Karthikeyan Thangamariappan
2019 — conf
Contract-based hierarchical resilience framework for cyber-physical systems: demo abstract.
ICCPS
Daniel Jun Xian Ng, Arvind Easwaran, Sidharta Andalam
2019 C conf
TiLA: Twin-in-the-Loop Architecture for Cyber-Physical Production Systems.
ICCD
HeeJong Park, Arvind Easwaran, Sidharta Andalam
2018 J jnl
A Parametric Computational Model of the Action Potential of Pacemaker Cells.
IEEE Trans. Biomed. Eng.
Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Sidharta Andalam, Eugene Yip, Nathan Allen, Mark L. Trew
2018 C conf
CLAIR: A Contract-Based Framework for Developing Resilient CPS Architectures.
ISORC
Sidharta Andalam, Daniel Jun Xian Ng, Arvind Easwaran, Karthikeyan Thangamariappan
2018 — conf
Challenges in Digital Twin Development for Cyber-Physical Production Systems.
CyPhy/WESE
HeeJong Park, Arvind Easwaran, Sidharta Andalam
2018 C conf
Rethinking the Validation Process for Medical Devices: A Cardiac Pacemaker Case Study.
ISORC
Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew
2018 J jnl
Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation.
ACM Trans. Cyber Phys. Syst.
Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark L. Trew, Weiwei Ai, Nitish D. Patel
2017 J jnl
A Novel Emulation Model of the Cardiac Conduction System.
ACM Trans. Embed. Comput. Syst.
Sidharta Andalam, Nathan Allen, Avinash Malik, Partha S. Roop, Mark Trew
2017 J jnl
Memory-Aware Embedded Control Systems Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wanli Chang, Dip Goswami, Samarjit Chakraborty, Lei Ju, Chun Jason Xue, Sidharta Andalam
2017 J jnl
Modular Compilation of Hybrid Systems for Emulation and Large Scale Simulation.
ACM Trans. Embed. Comput. Syst.
Avinash Malik, Partha S. Roop, Sidharta Andalam, Mark Trew, Michael Mendler
2016 — conf
Hybrid Automata Model of the Heart for Formal Verification of Pacemakers.
ARCH@CPSWeek
Sidharta Andalam, Avinash Malik, Partha S. Roop, Mark L. Trew
2016 — conf
Hybrid automata models of cardiac ventricular electrophysiology for real-time computational applications.
EMBC
Sidharta Andalam, Harshavardhan Ramanna, Avinash Malik, Partha S. Roop, Nitish D. Patel, Mark L. Trew
2016 A conf
Modular code generation for emulating the electrical conduction system of the human heart.
DATE
Nathan Allen, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Nitish D. Patel
2016 A conf
Precision timed industrial automation systems.
DATE
Matthew M. Y. Kuo, Sidharta Andalam, Partha S. Roop
2016 J jnl
Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing.
CoRR
Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Weiwei Ai, Nitish D. Patel
2015 J jnl
A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC).
CoRR
Avinash Malik, Partha S. Roop, Sidharta Andalam, Eugene Yip, Mark Trew
2014 J jnl
A Predictable Framework for Safety-Critical Embedded Systems.
IEEE Trans. Computers
Sidharta Andalam, Partha S. Roop, Alain Girault, Claus Traulsen
2014 A* conf
Schedule Integration Framework for Time-Triggered Automotive Architectures.
DAC
Florian Sagstetter, Sidharta Andalam, Peter Waszecki, Martin Lukasiewycz, Hauke Stähle, Samarjit Chakraborty, Alois C. Knoll
2013 Misc conf
ILPc: A novel approach for scalable timing analysis of synchronous programs.
CASES
Jia Jie Wang, Partha S. Roop, Sidharta Andalam
2013 A* conf
Precise timing analysis for direct-mapped caches.
DAC
Sidharta Andalam, Alain Girault, Roopak Sinha, Partha S. Roop, Jan Reineke
2013 — conf
Precision Timed Embedded Systems Using TickPAD Memory.
ACSD
Matthew M. Y. Kuo, Partha S. Roop, Sidharta Andalam, Nitish D. Patel
2013 A* conf
System architecture and software design for electric vehicles.
DAC
Martin Lukasiewycz, Sebastian Steinhorst, Sidharta Andalam, Florian Sagstetter, Peter Waszecki, Wanli Chang, Matthias Kauer, Philipp Mundhenk, Shanker Shreejith, Suhaib A. Fahmy, Samarjit Chakraborty
2011 — conf
Environment Modelling for Tighter Timing Analysis of Synchronous Programs.
DELTA
Sidharta Andalam, Roopak Sinha, Partha S. Roop
2011 A conf
Pruning infeasible paths for tight WCRT analysis of synchronous programs.
DATE
Sidharta Andalam, Partha S. Roop, Alain Girault
2010 A conf
Deterministic, predictable and light-weight multithreading using PRET-C.
DATE
Sidharta Andalam, Partha S. Roop, Alain Girault
2010 C conf
Predictable multithreading of embedded applications using PRET-C.
MEMOCODE
Sidharta Andalam, Partha S. Roop, Alain Girault
2009 J jnl
A New Multithreaded Architecture Supporting Direct Execution of Esterel.
EURASIP J. Embed. Syst.
Simon Yuan, Li Hsien Yoong, Sidharta Andalam, Partha S. Roop, Zoran Salcic
2009 Misc conf
Tight WCRT analysis of synchronous C programs.
CASES
Partha S. Roop, Sidharta Andalam, Reinhard von Hanxleden, Simon Yuan, Claus Traulsen
2008 — conf
STARPro - A new multithreaded direct execution platform for Esterel.
SLA++P
Simon Yuan, Sidharta Andalam, Li Hsien Yoong, Partha S. Roop, Zoran A. Salcic