Siddharth Garg

303 papers A* 30A 30B 10C 5Misc 13Journal 179Unranked 34

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	AI In Cybersecurity Education - Scalable Agentic CTF Design Principles and Educational Outcomes. CoRR Haoran Xi, Minghao Shao, Kimberly Milner, Venkata Sai Charan Putrevu, Nanda Rani, Meet Udeshi, Prashanth Krishnamurthy, Brendan Dolan-Gavitt, Siddharth Garg, Sandeep Kumar Shukla, Farshad Khorrami, Alon Hillel-Tuch, Muhammad Shafique, Ramesh Karri
2026	J	`jnl`	Exploring the Agentic Frontier of Verilog Code Generation. CoRR Patrick Yubeaton, Siddharth Garg, Chinmay Hegde
2026	J	`jnl`	GUIDE: GenAI Units In Digital Design Education. CoRR Weihua Xiao, Jason Blocklove, Matthew DeLorenzo, Johann Knechtel, Ozgur Sinanoglu, Kanad Basu, Jeyavijayan Rajendran, Siddharth Garg, Ramesh Karri
2026	J	`jnl`	GroundCount: Grounding Vision-Language Models with Object Detection for Mitigating Counting Hallucinations. CoRR Boyuan Chen, Minghao Shao, Siddharth Garg, Ramesh Karri, Muhammad Shafique
2026	J	`jnl`	Introduction to the Special Issue on Machine Learning for CAD, Part I. ACM Trans. Design Autom. Electr. Syst. Yibo Lin, Siddharth Garg, Hussam Amrouch, Cong Hao
2026	—	`conf`	LLM-Driven Python-to-Rust Translation for Efficient and Safe Code for Neural Networks: llm4py2rs. ICISSP (2) Rupesh Raj Karn, Johann Knechtel, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu
2026	J	`jnl`	Learned Precoding-Oriented CSI Feedback in Multi-Cell Multi-User MIMO Systems. IEEE Trans. Wirel. Commun. Fabrizio Carpi, Sivarama Venkatesan, Jinfeng Du, Harish Viswanathan, Siddharth Garg, Elza Erkip
2026	A*	`conf`	MetaCipher: A Time-Persistent and Universal Multi-Agent Framework for Cipher-Based Jailbreak Attacks for LLMs. AAAI Boyuan Chen, Minghao Shao, Abdul Basit, Siddharth Garg, Muhammad Shafique
2026	J	`jnl`	VeriInteresting: An Empirical Study of Model Prompt Interactions in Verilog Code Generation. CoRR Luca Collini, Andrew Hennesee, Patrick Yubeaton, Siddharth Garg, Ramesh Karri
2026	A*	`conf`	zkPHIRE: A Programmable Accelerator for ZKPs over HIgh-degRee, Expressive Gates. HPCA Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025	—	`conf`	A Spatial Array for Spectrally Agile Wireless Processing. IEEECONF Ali Rasteh, Andrew Hennessee, Ishaan Shivhare, Siddharth Garg, Sundeep Rangan, Brandon Reagen
2025	J	`jnl`	A Spatial Array for Spectrally Agile Wireless Processing. CoRR Ali Rasteh, Andrew Hennessee, Ishaan Shivhare, Siddharth Garg, Sundeep Rangan, Brandon Reagen
2025	J	`jnl`	Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback. ACM Trans. Design Autom. Electr. Syst. Jason Blocklove, Shailja Thakur, Benjamin Tan, Hammond Pearce, Siddharth Garg, Ramesh Karri
2025	J	`jnl`	C2HLSC: Leveraging Large Language Models to Bridge the Software-to-Hardware Design Gap. ACM Trans. Design Autom. Electr. Syst. Luca Collini, Siddharth Garg, Ramesh Karri
2025	J	`jnl`	Can Reasoning Models Reason about Hardware? An Agentic HLS Perspective. CoRR Luca Collini, Andrew Hennessee, Ramesh Karri, Siddharth Garg
2025	J	`jnl`	Chain-of-Frames: Advancing Video Understanding in Multimodal LLMs via Frame-Aware Reasoning. CoRR Sara Ghazanfari, Francesco Croce, Nicolas Flammarion, Prashanth Krishnamurthy, Farshad Khorrami, Siddharth Garg
2025	J	`jnl`	Detecting All-to-One Backdoor Attacks in Black-Box DNNs via Differential Robustness to Noise. IEEE Access Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2025	J	`jnl`	EMMA: Efficient Visual Alignment in Multi-Modal LLMs. Trans. Mach. Learn. Res. Sara Ghazanfari, Alexandre Araujo, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2025	J	`jnl`	Huff-LLM: End-to-End Lossless Compression for Efficient LLM Inference. CoRR Patrick Yubeaton, Tareq Mahmoud, Shehab Naga, Pooria Taheri, Tianhua Xia, Arun George, Yasmein Khalil, Sai Qian Zhang, Siddharth Joshi, Chinmay Hegde, Siddharth Garg
2025	—	`conf`	Hybrid-NL2SVA: Integrating RAG and Finetuning for LLM-based NL2SVA. MLCAD Weihua Xiao, Derek Ekberg, Siddharth Garg, Ramesh Karri
2025	J	`jnl`	Hybrid-NL2SVA: Integrating RAG and Finetuning for LLM-based NL2SVA. CoRR Weihua Xiao, Derek Ekberg, Siddharth Garg, Ramesh Karri
2025	—	`conf`	Large Language Models (LLMs) for Electronic Design Automation (EDA) : Special Session Paper. SOCC Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li
2025	J	`jnl`	Large Language Models (LLMs) for Electronic Design Automation (EDA). CoRR Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li
2025	B	`conf`	Large Language Models (LLMs) for Verification, Testing, and Design. ETS Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler
2025	J	`jnl`	Learning-Based Compress-and-Forward Schemes for the Relay Channel. IEEE J. Sel. Areas Commun. Ezgi Özyilkan, Fabrizio Carpi, Siddharth Garg, Elza Erkip
2025	—	`conf`	MTU: The Multifunction Tree Unit for Accelerating Zero-Knowledge Proofs. HASP@MICRO Jianqiao Mo, Alhad Daftardar, Joey Ah-kiow, Kaiyue Guo, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025	J	`jnl`	MTU: The Multifunction Tree Unit in zkSpeed for Accelerating HyperPlonk. CoRR Jianqiao Mo, Alhad Daftardar, Joey Ah-kiow, Kaiyue Guo, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025	J	`jnl`	MetaCipher: A General and Extensible Reinforcement Learning Framework for Obfuscation-Based Jailbreak Attacks on Black-Box LLMs. CoRR Boyuan Chen, Minghao Shao, Abdul Basit, Siddharth Garg, Muhammad Shafique
2025	B	`conf`	Model Cascading for Code: A Cascaded Black-Box Multi-Model Framework for Cost-Efficient Code Completion with Self-Testing. IJCNN Boyuan Chen, Mingzhi Zhu, Brendan Dolan-Gavitt, Muhammad Shafique, Siddharth Garg
2025	A*	`conf`	Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs. ISCA Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025	J	`jnl`	Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs. CoRR Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025	J	`jnl`	Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs. IACR Cryptol. ePrint Arch. Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025	J	`jnl`	TrojanLoC: LLM-based Framework for RTL Trojan Localization. CoRR Weihua Xiao, Zeng Wang, Minghao Shao, Raghu Vamshi Hemadri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel, Siddharth Garg, Ramesh Karri
2025	J	`jnl`	Uncertainty-Aware Deep Neural Representations for Visual Analysis of Vector Field Data. IEEE Trans. Vis. Comput. Graph. Atul Kumar, Siddharth Garg, Soumya Dutta
2025	J	`jnl`	VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Code. CoRR Raghu Vamshi Hemadri, Jitendra Bhandari, Andre Nakkab, Johann Knechtel, Badri P. Gopalan, Ramesh Narayanaswamy, Ramesh Karri, Siddharth Garg
2025	J	`jnl`	VeriThoughts: Enabling Automated Verilog Code Generation using Reasoning and Formal Verification. CoRR Patrick Yubeaton, Andre Nakkab, Weihua Xiao, Luca Collini, Ramesh Karri, Chinmay Hegde, Siddharth Garg
2025	J	`jnl`	zkPHIRE: A Programmable Accelerator for ZKPs over HIgh-degRee, Expressive Gates. CoRR Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2024	A	`conf`	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search. ICCAD Jitendra Bhandari, Animesh Basak Chowdhury, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel
2024	J	`jnl`	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search. CoRR Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel
2024	J	`jnl`	An Empirical Evaluation of LLMs for Solving Offensive Security Challenges. CoRR Minghao Shao, Boyuan Chen, Sofija Jancheska, Brendan Dolan-Gavitt, Siddharth Garg, Ramesh Karri, Muhammad Shafique
2024	J	`jnl`	C2HLSC: Can LLMs Bridge the Software-to-Hardware Design Gap? CoRR Luca Collini, Siddharth Garg, Ramesh Karri
2024	J	`jnl`	C2HLSC: Leveraging Large Language Models to Bridge the Software-to-Hardware Design Gap. CoRR Luca Collini, Siddharth Garg, Ramesh Karri
2024	J	`jnl`	Can EDA Tool Feedback Improve Verilog Generation by LLMs? CoRR Jason Blocklove, Shailja Thakur, Benjamin Tan, Hammond Pearce, Siddharth Garg, Ramesh Karri
2024	J	`jnl`	EMMA: Efficient Visual Alignment in Multi-Modal LLMs. CoRR Sara Ghazanfari, Alexandre Araujo, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2024	J	`jnl`	Evaluating LLMs for Hardware Design and Test. CoRR Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce
2024	J	`jnl`	Hyper-parameter Tuning for Fair Classification without Sensitive Attribute Access. Trans. Mach. Learn. Res. Akshaj Kumar Veldanda, Ivan Brugere, Sanghamitra Dutta, Alan Mishler, Siddharth Garg
2024	J	`jnl`	LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines. CoRR Jitendra Bhandari, Johann Knechtel, Ramesh Narayanaswamy, Siddharth Garg, Ramesh Karri
2024	—	`conf`	Learned Pulse Shaping Design for PAPR Reduction in DFT-s-OFDM. SPAWC Fabrizio Carpi, Soheil Rostami, Joonyoung Cho, Siddharth Garg, Elza Erkip, Charlie Jianzhong Zhang
2024	J	`jnl`	Learned Pulse Shaping Design for PAPR Reduction in DFT-s-OFDM. CoRR Fabrizio Carpi, Soheil Rostami, Joonyoung Cho, Siddharth Garg, Elza Erkip, Charlie Jianzhong Zhang
2024	J	`jnl`	Learning-Based Compress-and-Forward Schemes for the Relay Channel. CoRR Ezgi Özyilkan, Fabrizio Carpi, Siddharth Garg, Elza Erkip
2024	A*	`conf`	LipSim: A Provably Robust Perceptual Similarity Metric. ICLR Sara Ghazanfari, Alexandre Araujo, Prashanth Krishnamurthy, Farshad Khorrami, Siddharth Garg
2024	J	`jnl`	Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS. CoRR Matthew DeLorenzo, Animesh Basak Chowdhury, Vasudev Gohil, Shailja Thakur, Ramesh Karri, Siddharth Garg, Jeyavijayan Rajendran
2024	J	`jnl`	Manipulation Attacks on Learned Image Compression. IEEE Trans. Artif. Intell. Kang Liu, Di Wu, Yangyu Wu, Yiru Wang, Dan Feng, Benjamin Tan, Siddharth Garg
2024	J	`jnl`	Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI. CoRR Jitendra Bhandari, Vineet Bhat, Yuheng He, Siddharth Garg, Hamed Rahmani, Ramesh Karri
2024	J	`jnl`	Model Cascading for Code: Reducing Inference Costs with Model Cascading for LLM Based Code Generation. CoRR Boyuan Chen, Mingzhi Zhu, Brendan Dolan-Gavitt, Muhammad Shafique, Siddharth Garg
2024	A*	`conf`	NYU CTF Bench: A Scalable Open-Source Benchmark Dataset for Evaluating LLMs in Offensive Security. NeurIPS Minghao Shao, Sofija Jancheska, Meet Udeshi, Brendan Dolan-Gavitt, Haoran Xi, Kimberly Milner, Boyuan Chen, Max Yin, Siddharth Garg, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri, Muhammad Shafique
2024	J	`jnl`	NYU CTF Dataset: A Scalable Open-Source Benchmark Dataset for Evaluating LLMs in Offensive Security. CoRR Minghao Shao, Sofija Jancheska, Meet Udeshi, Brendan Dolan-Gavitt, Haoran Xi, Kimberly Milner, Boyuan Chen, Max Yin, Siddharth Garg, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri, Muhammad Shafique
2024	—	`conf`	Neural Compress-and-Forward for the Relay Channel. SPAWC Ezgi Özyilkan, Fabrizio Carpi, Siddharth Garg, Elza Erkip
2024	J	`jnl`	Neural Compress-and-Forward for the Relay Channel. CoRR Ezgi Özyilkan, Fabrizio Carpi, Siddharth Garg, Elza Erkip
2024	A*	`conf`	Novel Quadratic Constraints for Extending LipSDP beyond Slope-Restricted Activations. ICLR Patricia Pauli, Aaron J. Havens, Alexandre Araujo, Siddharth Garg, Farshad Khorrami, Frank Allgöwer, Bin Hu
2024	J	`jnl`	Novel Quadratic Constraints for Extending LipSDP beyond Slope-Restricted Activations. CoRR Patricia Pauli, Aaron J. Havens, Alexandre Araujo, Siddharth Garg, Farshad Khorrami, Frank Allgöwer, Bin Hu
2024	A	`conf`	On the (In)feasibility of ML Backdoor Detection as an Hypothesis Testing Problem. AISTATS Georg Pichler, Marco Romanelli, Divya Prakash Manivannan, Prashanth Krishnamurthy, Farshad Khorrami, Siddharth Garg
2024	J	`jnl`	On the (In)feasibility of ML Backdoor Detection as an Hypothesis Testing Problem. CoRR Georg Pichler, Marco Romanelli, Divya Prakash Manivannan, Prashanth Krishnamurthy, Farshad Khorrami, Siddharth Garg
2024	J	`jnl`	Out-of-Distribution Detection with Overlap Index. CoRR Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2024	J	`jnl`	PrefixLLM: LLM-aided Prefix Circuit Design. CoRR Weihua Xiao, Venkata Sai Charan Putrevu, Raghu Vamshi Hemadri, Siddharth Garg, Ramesh Karri
2024	J	`jnl`	PriViT: Vision Transformers for Private Inference. Trans. Mach. Learn. Res. Naren Dhyani, Jianqiao Cambridge Mo, Patrick Yubeaton, Minsu Cho, Ameya Joshi, Siddharth Garg, Brandon Reagen, Chinmay Hegde
2024	J	`jnl`	Privacy-Preserving Collaborative Learning Through Feature Extraction. IEEE Trans. Dependable Secur. Comput. Alireza Sarmadi, Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2024	—	`ed.`	Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, MLCAD 2024, Salt Lake City, UT, USA, September 9-11, 2024 MLCAD Hussam Amrouch, Jiang Hu, Siddharth Garg, Yibo Lin
2024	A*	`conf`	Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization. ICLR Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan, Ramesh Karri, Siddharth Garg
2024	J	`jnl`	Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization. CoRR Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan, Ramesh Karri, Siddharth Garg
2024	—	`conf`	Rome was Not Built in a Single Step: Hierarchical Prompting for LLM-based Chip Design. MLCAD Andre Nakkab, Sai Qian Zhang, Ramesh Karri, Siddharth Garg
2024	J	`jnl`	Rome was Not Built in a Single Step: Hierarchical Prompting for LLM-based Chip Design. CoRR Andre Nakkab, Sai Qian Zhang, Ramesh Karri, Siddharth Garg
2024	B	`conf`	SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs. PACT Alhad Daftardar, Brandon Reagen, Siddharth Garg
2024	J	`jnl`	SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs. CoRR Alhad Daftardar, Brandon Reagen, Siddharth Garg
2024	J	`jnl`	Split Computing With Scalable Feature Compression for Visual Analytics on the Edge. IEEE Trans. Multim. Zhongzheng Yuan, Samyak Rawlekar, Siddharth Garg, Elza Erkip, Yao Wang
2024	J	`jnl`	Towards Unified Benchmark and Models for Multi-Modal Perceptual Metrics. CoRR Sara Ghazanfari, Siddharth Garg, Nicolas Flammarion, Prashanth Krishnamurthy, Farshad Khorrami, Francesco Croce
2024	J	`jnl`	TruncFormer: Private LLM Inference Using Only Truncations. CoRR Patrick Yubeaton, Jianqiao Mo, Karthik Garimella, Nandan Kumar Jha, Brandon Reagen, Chinmay Hegde, Siddharth Garg
2024	J	`jnl`	Uncertainty-Aware Deep Neural Representations for Visual Analysis of Vector Field Data. CoRR Atul Kumar, Siddharth Garg, Soumya Dutta
2024	J	`jnl`	VeriGen: A Large Language Model for Verilog Code Generation. ACM Trans. Design Autom. Electr. Syst. Shailja Thakur, Baleegh Ahmad, Hammond Pearce, Benjamin Tan, Brendan Dolan-Gavitt, Ramesh Karri, Siddharth Garg
2023	J	`jnl`	A Minimax Approach Against Multi-Armed Adversarial Attacks Detection. CoRR Federica Granese, Marco Romanelli, Siddharth Garg, Pablo Piantanida
2023	A*	`conf`	ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. DAC Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
2023	J	`jnl`	ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. CoRR Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
2023	J	`jnl`	Are Emily and Greg Still More Employable than Lakisha and Jamal? Investigating Algorithmic Hiring Bias in the Era of ChatGPT. CoRR Akshaj Kumar Veldanda, Fabian Grob, Shailja Thakur, Hammond Pearce, Benjamin Tan, Ramesh Karri, Siddharth Garg
2023	J	`jnl`	AutoChip: Automating HDL Generation Using LLM Feedback. CoRR Shailja Thakur, Jason Blocklove, Hammond Pearce, Benjamin Tan, Siddharth Garg, Ramesh Karri
2023	A	`conf`	Benchmarking Large Language Models for Automated Verilog RTL Code Generation. DATE Shailja Thakur, Baleegh Ahmad, Zhenxing Fan, Hammond Pearce, Benjamin Tan, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg
2023	J	`jnl`	Bulls-Eye: Active Few-Shot Learning Guided Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Animesh Basak Chowdhury, Benjamin Tan, Ryan Carey, Tushit Jain, Ramesh Karri, Siddharth Garg
2023	—	`conf`	Can Deepfakes be created on a whim? WWW (Companion Volume) Pulak Mehta, Gauri Jagatap, Kevin Gallagher, Brian Timmerman, Progga Deb, Siddharth Garg, Rachel Greenstadt, Brendan Dolan-Gavitt
2023	J	`jnl`	Can deepfakes be created by novice users? CoRR Pulak Mehta, Gauri Jagatap, Kevin Gallagher, Brian Timmerman, Progga Deb, Siddharth Garg, Rachel Greenstadt, Brendan Dolan-Gavitt
2023	—	`conf`	Characterizing and Optimizing End-to-End Systems for Private Inference. ASPLOS (3) Karthik Garimella, Zahra Ghodsi, Nandan Kumar Jha, Siddharth Garg, Brandon Reagen
2023	—	`conf`	Chip-Chat: Challenges and Opportunities in Conversational Hardware Design. MLCAD Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce
2023	J	`jnl`	Chip-Chat: Challenges and Opportunities in Conversational Hardware Design. CoRR Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce
2023	—	`conf`	ConVERTS: Contrastively Learning Structurally InVariant Netlist Representations. MLCAD Animesh Basak Chowdhury, Jitendra Bhandari, Luca Collini, Ramesh Karri, Benjamin Tan, Siddharth Garg
2023	J	`jnl`	Differential Analysis of Triggers and Benign Features for Black-Box DNN Backdoor Detection. CoRR Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2023	J	`jnl`	Differential Analysis of Triggers and Benign Features for Black-Box DNN Backdoor Detection. IEEE Trans. Inf. Forensics Secur. Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2023	A*	`conf`	Exploiting Connections between Lipschitz Structures for Certifiably Robust Deep Equilibrium Models. NeurIPS Aaron J. Havens, Alexandre Araujo, Siddharth Garg, Farshad Khorrami, Bin Hu
2023	J	`jnl`	Fairness via In-Processing in the Over-parameterized Regime: A Cautionary Tale with MinDiff Loss. Trans. Mach. Learn. Res. Akshaj Kumar Veldanda, Ivan Brugere, Jiahao Chen, Sanghamitra Dutta, Alan Mishler, Siddharth Garg
2023	J	`jnl`	Hyper-parameter Tuning for Fair Classification without Sensitive Attribute Access. CoRR Akshaj Kumar Veldanda, Ivan Brugere, Sanghamitra Dutta, Alan Mishler, Siddharth Garg
2023	J	`jnl`	INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search. CoRR Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan, Ramesh Karri, Siddharth Garg
2023	A	`conf`	Invited Paper: Towards the Imagenets of ML4EDA. ICCAD Animesh Basak Chowdhury, Shailja Thakur, Hammond Pearce, Ramesh Karri, Siddharth Garg
2023	J	`jnl`	LipSim: A Provably Robust Perceptual Similarity Metric. CoRR Sara Ghazanfari, Alexandre Araujo, Prashanth Krishnamurthy, Farshad Khorrami, Siddharth Garg
2023	A*	`conf`	Lost at C: A User Study on the Security Implications of Large Language Model Code Assistants. USENIX Security Symposium Gustavo Sandoval, Hammond Pearce, Teo Nys, Ramesh Karri, Siddharth Garg, Brendan Dolan-Gavitt
2023	J	`jnl`	Optimizing the Use of Behavioral Locking for High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christian Pilato, Luca Collini, Luca Cassano, Donatella Sciuto, Siddharth Garg, Ramesh Karri
2023	A*	`conf`	Path Planning Under Uncertainty to Localize mmWave Sources. ICRA Kai Pfeiffer, Yuze Jia, Mingsheng Yin, Akshaj Kumar Veldanda, Yaqi Hu, Amee Trivedi, Jeff Zhang, Siddharth Garg, Elza Erkip, Sundeep Rangan, Ludovic Righetti
2023	J	`jnl`	Path Planning Under Uncertainty to Localize mmWave Sources. CoRR Kai Pfeiffer, Yuze Jia, Mingsheng Yin, Akshaj Kumar Veldanda, Yaqi Hu, Amee Trivedi, Jeff Zhang, Siddharth Garg, Elza Erkip, Sundeep Rangan, Ludovic Righetti
2023	—	`conf`	Precoding-oriented Massive MIMO CSI Feedback Design. ICC Fabrizio Carpi, Sivarama Venkatesan, Jinfeng Du, Harish Viswanathan, Siddharth Garg, Elza Erkip
2023	J	`jnl`	Precoding-oriented Massive MIMO CSI Feedback Design. CoRR Fabrizio Carpi, Sivarama Venkatesan, Jinfeng Du, Harish Viswanathan, Siddharth Garg, Elza Erkip
2023	J	`jnl`	PriViT: Vision Transformers for Fast Private Inference. CoRR Naren Dhyani, Jianqiao Mo, Minsu Cho, Ameya Joshi, Siddharth Garg, Brandon Reagen, Chinmay Hegde
2023	J	`jnl`	R-LPIPS: An Adversarially Robust Perceptual Similarity Metric. CoRR Sara Ghazanfari, Siddharth Garg, Prashanth Krishnamurthy, Farshad Khorrami, Alexandre Araujo
2023	Misc	`conf`	Special Session: Machine Learning for Embedded System Design. CODES+ISSS Erika S. Alcorta, Andreas Gerstlauer, Chenhui Deng, Qi Sun, Zhiru Zhang, Ceyu Xu, Lisa Wu Wills, Daniela Sanchez Lopera, Wolfgang Ecker, Siddharth Garg, Jiang Hu
2023	J	`jnl`	Towards Better Certified Segmentation via Diffusion Models. CoRR Othmane Laousy, Alexandre Araujo, Guillaume Chassagnon, Marie-Pierre Revel, Siddharth Garg, Farshad Khorrami, Maria Vakalopoulou
2023	A	`conf`	Towards better certified segmentation via diffusion models. UAI Othmane Laousy, Alexandre Araujo, Guillaume Chassagnon, Marie-Pierre Revel, Siddharth Garg, Farshad Khorrami, Maria Vakalopoulou
2023	J	`jnl`	Towards the Imagenets of ML4EDA. CoRR Animesh Basak Chowdhury, Shailja Thakur, Hammond Pearce, Ramesh Karri, Siddharth Garg
2023	J	`jnl`	VeriGen: A Large Language Model for Verilog Code Generation. CoRR Shailja Thakur, Baleegh Ahmad, Hammond Pearce, Benjamin Tan, Brendan Dolan-Gavitt, Ramesh Karri, Siddharth Garg
2022	J	`jnl`	A Feature-Based On-Line Detector to Remove Adversarial-Backdoors by Iterative Demarcation. IEEE Access Hao Fu, Akshaj Kumar Veldanda, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2022	J	`jnl`	An Upper Bound for the Distribution Overlap Index and Its Applications. CoRR Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2022	J	`jnl`	Benchmarking Large Language Models for Automated Verilog RTL Code Generation. CoRR Shailja Thakur, Baleegh Ahmad, Zhenxing Fan, Hammond Pearce, Benjamin Tan, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg
2022	J	`jnl`	Characterizing and Optimizing End-to-End Systems for Private Inference. CoRR Karthik Garimella, Zahra Ghodsi, Nandan Kumar Jha, Siddharth Garg, Brandon Reagen
2022	J	`jnl`	Denial-of-Service Attacks on Learned Image Compression. CoRR Kang Liu, Di Wu, Yiru Wang, Dan Feng, Benjamin Tan, Siddharth Garg
2022	J	`jnl`	Fairness via In-Processing in the Over-parameterized Regime: A Cautionary Tale. CoRR Akshaj Kumar Veldanda, Ivan Brugere, Jiahao Chen, Sanghamitra Dutta, Alan Mishler, Siddharth Garg
2022	—	`conf`	Feature Compression for Rate Constrained Object Detection on the Edge. MIPR Zhongzheng Yuan, Samyak Rawlekar, Siddharth Garg, Elza Erkip, Yao Wang
2022	J	`jnl`	Feature Compression for Rate Constrained Object Detection on the Edge. CoRR Zhongzheng Yuan, Samyak Rawlekar, Siddharth Garg, Elza Erkip, Yao Wang
2022	J	`jnl`	Guest Editorial: Trustworthy AI. ACM J. Emerg. Technol. Comput. Syst. Yier Jin, Tsung-Yi Ho, Stjepan Picek, Siddharth Garg
2022	A*	`conf`	High-level design methods for hardware security: is it the right choice? invited. DAC Christian Pilato, Donatella Sciuto, Benjamin Tan, Siddharth Garg, Ramesh Karri
2022	A	`conf`	Locked Circuit Indistinguishability: A Notion of Security for Logic Locking. CSF Mohamed El Massad, Nahid Juma, Jonathan Shahen, Mariana Raykova, Siddharth Garg, Mahesh Tripunitara
2022	J	`jnl`	Millimeter Wave Wireless Assisted Robot Navigation With Link State Classification. IEEE Open J. Commun. Soc. Mingsheng Yin, Akshaj Kumar Veldanda, Amee Trivedi, Jeff Zhang, Kai Pfeiffer, Yaqi Hu, Siddharth Garg, Elza Erkip, Ludovic Righetti, Sundeep Rangan
2022	J	`jnl`	Overriding Autonomous Driving Systems Using Adaptive Adversarial Billboards. IEEE Trans. Intell. Transp. Syst. Naman Patel, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2022	J	`jnl`	Privacy-Preserving Collaborative Learning through Feature Extraction. CoRR Alireza Sarmadi, Hao Fu, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2022	—	`ch.`	Protecting Hardware IP Cores During High-Level Synthesis. Behavioral Synthesis for Hardware Security Christian Pilato, Donatella Sciuto, Francesco Regazzoni, Siddharth Garg, Ramesh Karri
2022	J	`jnl`	Robust Deep Learning for IC Test Problems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Animesh Basak Chowdhury, Benjamin Tan, Siddharth Garg, Ramesh Karri
2022	J	`jnl`	Security Implications of Large Language Model Code Assistants: A User Study. CoRR Gustavo Sandoval, Hammond Pearce, Teo Nys, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg
2022	A*	`conf`	Selective Network Linearization for Efficient Private Inference. ICML Minsu Cho, Ameya Joshi, Brandon Reagen, Siddharth Garg, Chinmay Hegde
2022	J	`jnl`	Selective Network Linearization for Efficient Private Inference. CoRR Minsu Cho, Ameya Joshi, Siddharth Garg, Brandon Reagen, Chinmay Hegde
2022	J	`jnl`	Sphynx: A Deep Neural Network Design for Private Inference. IEEE Secur. Priv. Minsu Cho, Zahra Ghodsi, Brandon Reagen, Siddharth Garg, Chinmay Hegde
2022	J	`jnl`	Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis. CoRR Animesh Basak Chowdhury, Benjamin Tan, Ryan Carey, Tushit Jain, Ramesh Karri, Siddharth Garg
2021	J	`jnl`	A Concentration of Measure Approach to Correlated Graph Matching. IEEE J. Sel. Areas Inf. Theory Farhad Shirani, Siddharth Garg, Elza Erkip
2021	J	`jnl`	ASSURE: RTL Locking Against an Untrusted Foundry. IEEE Trans. Very Large Scale Integr. Syst. Christian Pilato, Animesh Basak Chowdhury, Donatella Sciuto, Siddharth Garg, Ramesh Karri
2021	J	`jnl`	Adversarially Robust Learning via Entropic Regularization. Frontiers Artif. Intell. Gauri Jagatap, Ameya Joshi, Animesh Basak Chowdhury, Siddharth Garg, Chinmay Hegde
2021	—	`conf`	Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method. ASP-DAC Haoyu Yang, Shifan Zhang, Kang Liu, Siting Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg, Bei Yu, Evangeline F. Y. Young
2021	J	`jnl`	Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri
2021	A*	`conf`	Circa: Stochastic ReLUs for Private Deep Learning. NeurIPS Zahra Ghodsi, Nandan Kumar Jha, Brandon Reagen, Siddharth Garg
2021	J	`jnl`	Circa: Stochastic ReLUs for Private Deep Learning. CoRR Zahra Ghodsi, Nandan Kumar Jha, Brandon Reagen, Siddharth Garg
2021	J	`jnl`	CryptoNite: Revealing the Pitfalls of End-to-End Private Inference at Scale. CoRR Karthik Garimella, Nandan Kumar Jha, Zahra Ghodsi, Siddharth Garg, Brandon Reagen
2021	A*	`conf`	DeepReDuce: ReLU Reduction for Fast Private Inference. ICML Nandan Kumar Jha, Zahra Ghodsi, Siddharth Garg, Brandon Reagen
2021	J	`jnl`	DeepReDuce: ReLU Reduction for Fast Private Inference. CoRR Nandan Kumar Jha, Zahra Ghodsi, Siddharth Garg, Brandon Reagen
2021	A*	`conf`	Fortifying RTL Locking Against Oracle-Less (Untrusted Foundry) and Oracle-Guided Attacks. DAC Nimisha Limaye, Animesh Basak Chowdhury, Christian Pilato, Mohammed Thari Nabeel, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri
2021	C	`conf`	Generating and Characterizing Scenarios for Safety Testing of Autonomous Vehicles. IV Zahra Ghodsi, Siva Kumar Sastry Hari, Iuri Frosio, Timothy Tsai, Alejandro J. Troccoli, Stephen W. Keckler, Siddharth Garg, Anima Anandkumar
2021	J	`jnl`	Generating and Characterizing Scenarios for Safety Testing of Autonomous Vehicles. CoRR Zahra Ghodsi, Siva Kumar Sastry Hari, Iuri Frosio, Timothy Tsai, Alejandro J. Troccoli, Stephen W. Keckler, Siddharth Garg, Anima Anandkumar
2021	J	`jnl`	Guest Editors' Introduction: Competing to Secure SoCs. IEEE Des. Test Siddharth Garg, Daniel E. Holcomb, Jeyavijayan (JV) Rajendran, Ahmad-Reza Sadeghi
2021	A*	`conf`	Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP. DAC Benjamin Tan, Siddharth Garg, Ramesh Karri, Yuntao Liu, Michael Zuzak, Abhisek Chakraborty, Ankur Srivastava, Omid Aramoon, Qian Xu, Gang Qu, Adam A. Porter, Jeno Szep, Warren Savage
2021	J	`jnl`	Millimeter Wave Wireless-Assisted Robotic Navigation with Link State Classification. CoRR Mingsheng Yin, Akshaj Kumar Veldanda, Amee Trivedi, Jeff Zhang, Kai Pfeiffer, Yaqi Hu, Siddharth Garg, Elza Erkip, Ludovic Righetti, Sundeep Rangan
2021	—	`conf`	NNoculation: Catching BadNets in the Wild. AISec@CCS Akshaj Kumar Veldanda, Kang Liu, Benjamin Tan, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg
2021	B	`conf`	On Graph Matching Using Generalized Seed Side-Information. ISIT Mahshad Shariatnasab, Farhad Shirani, Siddharth Garg, Elza Erkip
2021	J	`jnl`	On Graph Matching Using Generalized Seed Side-Information. CoRR Mahshad Shariatnasab, Farhad Shirani, Siddharth Garg, Elza Erkip
2021	J	`jnl`	On the Optimization of Behavioral Logic Locking for High-Level Synthesis. CoRR Christian Pilato, Luca Collini, Luca Cassano, Donatella Sciuto, Siddharth Garg, Ramesh Karri
2021	J	`jnl`	OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis. CoRR Animesh Basak Chowdhury, Benjamin Tan, Ramesh Karri, Siddharth Garg
2021	—	`conf`	Single-Shot Compression for Hypothesis Testing. SPAWC Fabrizio Carpi, Siddharth Garg, Elza Erkip
2021	J	`jnl`	Single-Shot Compression for Hypothesis Testing. CoRR Fabrizio Carpi, Siddharth Garg, Elza Erkip
2021	J	`jnl`	Special Section on Attacking and Protecting Artificial Intelligence. CAAI Trans. Intell. Technol. Shivam Bhasin, Siddharth Garg, Francesco Regazzoni
2021	J	`jnl`	Sphynx: ReLU-Efficient Network Design for Private Inference. CoRR Minsu Cho, Zahra Ghodsi, Brandon Reagen, Siddharth Garg, Chinmay Hegde
2021	A*	`conf`	Subverting Privacy-Preserving GANs: Hiding Secrets in Sanitized Images. AAAI Kang Liu, Benjamin Tan, Siddharth Garg
2021	J	`jnl`	Training Data Poisoning in ML-CAD: Backdooring DL-Based Lithographic Hotspot Detectors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kang Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg
2021	A	`conf`	Vertical IP Protection of the Next-Generation Devices: Quo Vadis? DATE Shubham Rai, Siddharth Garg, Christian Pilato, Vladimir Herdt, Elmira Moussavi, Dominik Sisejkovic, Ramesh Karri, Rolf Drechsler, Farhad Merchant, Akash Kumar
2020	J	`jnl`	A Concentration of Measure Approach to Correlated Graph Matching. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2020	J	`jnl`	ASSURE: RTL Locking Against an Untrusted Foundry. CoRR Christian Pilato, Animesh Basak Chowdhury, Donatella Sciuto, Siddharth Garg, Ramesh Karri
2020	J	`jnl`	Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection. ACM Trans. Design Autom. Electr. Syst. Kang Liu, Haoyu Yang, Yuzhe Ma, Benjamin Tan, Bei Yu, Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg
2020	J	`jnl`	Adversarially Robust Learning via Entropic Regularization. CoRR Gauri Jagatap, Animesh Basak Chowdhury, Siddharth Garg, Chinmay Hegde
2020	B	`conf`	Anomaly Detection in Embedded Systems Using Power and Memory Side Channels. ETS Jiho Park, Virinchi Roy Surabhi, Prashanth Krishnamurthy, Siddharth Garg, Ramesh Karri, Farshad Khorrami
2020	J	`jnl`	Bait and Switch: Online Training Data Poisoning of Autonomous Driving Systems. CoRR Naman Patel, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2020	J	`jnl`	Bias Busters: Robustifying DL-based Lithographic Hotspot Detectors Against Backdooring Attacks. CoRR Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri
2020	A*	`conf`	CryptoNAS: Private Inference on a ReLU Budget. NeurIPS Zahra Ghodsi, Akshaj Kumar Veldanda, Brandon Reagen, Siddharth Garg
2020	J	`jnl`	CryptoNAS: Private Inference on a ReLU Budget. CoRR Zahra Ghodsi, Akshaj Kumar Veldanda, Brandon Reagen, Siddharth Garg
2020	J	`jnl`	Detecting Backdoors in Neural Networks Using Novel Feature-Based Anomaly Detection. CoRR Hao Fu, Akshaj Kumar Veldanda, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2020	J	`jnl`	Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication. IEEE Embed. Syst. Lett. Maria I. Mera Collantes, Siddharth Garg
2020	J	`jnl`	Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep Learning Accelerators. IEEE Des. Test Jeff Zhang, Zahra Ghodsi, Siddharth Garg, Kartheek Rangineni
2020	A	`conf`	Is Register Transfer Level Locking Secure? DATE Chandan Karfa, Ramanuj Chouksey, Christian Pilato, Siddharth Garg, Ramesh Karri
2020	—	`conf`	Model-Switching: Dealing with Fluctuating Workloads in Machine-Learning-as-a-Service Systems. HotCloud Jeff Zhang, Sameh Elnikety, Shuayb Zarar, Atul Gupta, Siddharth Garg
2020	J	`jnl`	NNoculation: Broad Spectrum and Targeted Treatment of Backdoored DNNs. CoRR Akshaj Kumar Veldanda, Kang Liu, Benjamin Tan, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg
2020	J	`jnl`	On Evaluating Neural Network Backdoor Defenses. CoRR Akshaj Kumar Veldanda, Siddharth Garg
2020	J	`jnl`	On the Joint Typicality of Permutations of Sequences of Random Variables. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2020	A	`conf`	Poisoning the (Data) Well in ML-Based CAD: A Case Study of Hiding Lithographic Hotspots. DATE Kang Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg
2020	Misc	`conf`	SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks. VTS Maria I. Mera Collantes, Zahra Ghodsi, Siddharth Garg
2020	J	`jnl`	Subverting Privacy-Preserving GANs: Hiding Secrets in Sanitized Images. CoRR Kang Liu, Benjamin Tan, Siddharth Garg
2020	J	`jnl`	The SAT Attack on IC Camouflaging: Impact and Potential Countermeasures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohamed El Massad, Siddharth Garg, Mahesh V. Tripunitara
2019	B	`conf`	A Concentration of Measure Approach to Database De-anonymization. ISIT Farhad Shirani, Siddharth Garg, Elza Erkip
2019	J	`jnl`	A Concentration of Measure Approach to Database De-anonymization. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2019	A	`conf`	Adaptive Adversarial Videos on Roadside Billboards: Dynamically Modifying Trajectories of Autonomous Vehicles. IROS Naman Patel, Prashanth Krishnamurthy, Siddharth Garg, Farshad Khorrami
2019	J	`jnl`	Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection. CoRR Kang Liu, Haoyu Yang, Yuzhe Ma, Benjamin Tan, Bei Yu, Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg
2019	J	`jnl`	BadNets: Evaluating Backdooring Attacks on Deep Neural Networks. IEEE Access Tianyu Gu, Kang Liu, Brendan Dolan-Gavitt, Siddharth Garg
2019	A*	`conf`	Building Robust Machine Learning Systems: Current Progress, Research Challenges, and Opportunities. DAC Jeff Jun Zhang, Kang Liu, Faiq Khalid, Muhammad Abdullah Hanif, Semeen Rehman, Theocharis Theocharides, Alessandro Artussi, Muhammad Shafique, Siddharth Garg
2019	J	`jnl`	CompAct: On-chip <underline>Com</underline>pression of <underline>Act</underline>ivations for Low Power Systolic Array Based CNN Acceleration. ACM Trans. Embed. Comput. Syst. Jeff Jun Zhang, Parul Raj, Shuayb Zarar, Amol Ambardekar, Siddharth Garg
2019	J	`jnl`	Fault-Tolerant Systolic Array Based Accelerators for Deep Neural Network Execution. IEEE Des. Test Jeff Jun Zhang, Kanad Basu, Siddharth Garg
2019	J	`jnl`	Split Manufacturing-Based Register Transfer-Level Obfuscation. ACM J. Emerg. Technol. Comput. Syst. Xiaotong Cui, Jeff Jun Zhang, Kaijie Wu, Siddharth Garg, Ramesh Karri
2019	J	`jnl`	TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christian Pilato, Kaijie Wu, Siddharth Garg, Ramesh Karri, Francesco Regazzoni
2019	A	`conf`	TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint. DATE Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique
2018	J	`jnl`	Analyzing and Mitigating the Impact of Permanent Faults on a Systolic Array Based Neural Network Accelerator. CoRR Jeff Zhang, Tianyu Gu, Kanad Basu, Siddharth Garg
2018	Misc	`conf`	Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator. VTS Jeff Jun Zhang, Tianyu Gu, Kanad Basu, Siddharth Garg
2018	J	`jnl`	Chapter Five - Dynamic Power Management for Dark Silicon Multicore Processors Adv. Comput. Siddharth Garg
2018	J	`jnl`	FATE: Fast and Accurate Timing Error Prediction Framework for Low Power DNN Accelerator Design. CoRR Jeff Zhang, Siddharth Garg
2018	A	`conf`	FATE: fast and accurate timing error prediction framework for low power DNN accelerator design. ICCAD Jeff Jun Zhang, Siddharth Garg
2018	A	`conf`	Fine-Pruning: Defending Against Backdooring Attacks on Deep Neural Networks. RAID Kang Liu, Brendan Dolan-Gavitt, Siddharth Garg
2018	J	`jnl`	Fine-Pruning: Defending Against Backdooring Attacks on Deep Neural Networks. CoRR Kang Liu, Brendan Dolan-Gavitt, Siddharth Garg
2018	—	`conf`	Matching Graphs with Community Structure: A Concentration of Measure Approach. Allerton Farhad Shirani, Siddharth Garg, Elza Erkip
2018	J	`jnl`	Matching Graphs with Community Structure: A Concentration of Measure Approach. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2018	J	`jnl`	Optimal Active Social Network De-anonymization Using Information Thresholds. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2018	B	`conf`	Optimal Active social Network De-anonymization Using Information Thresholds. ISIT Farhad Shirani, Siddharth Garg, Elza Erkip
2018	J	`jnl`	Outsourcing Private Machine Learning via Lightweight Secure Arithmetic Computation. CoRR Siddharth Garg, Zahra Ghodsi, Carmit Hazay, Yuval Ishai, Antonio Marcedone, Muthuramakrishnan Venkitasubramaniam
2018	J	`jnl`	Securing Hardware Accelerators: A New Challenge for High-Level Synthesis. IEEE Embed. Syst. Lett. Christian Pilato, Siddharth Garg, Kaijie Wu, Ramesh Karri, Francesco Regazzoni
2018	Misc	`conf`	Special session: Recent developments in hardware security. VTS Ro Cammarota, Naghmeh Karimi, Siddharth Garg, Jeyavijayan Rajendran
2018	A*	`conf`	TAO: techniques for algorithm-level obfuscation during high-level synthesis. DAC Christian Pilato, Francesco Regazzoni, Ramesh Karri, Siddharth Garg
2018	J	`jnl`	ThUnderVolt: Enabling Aggressive Voltage Underscaling and Timing Error Resilience for Energy Efficient Deep Neural Network Accelerators. CoRR Jeff Zhang, Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg
2018	A*	`conf`	Thundervolt: enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. DAC Jeff Zhang, Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg
2018	J	`jnl`	TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint. CoRR Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique
2018	B	`conf`	Typicality Matching for Pairs of Correlated Graphs. ISIT Farhad Shirani, Siddharth Garg, Elza Erkip
2018	J	`jnl`	Typicality Matching for Pairs of Correlated Graphs. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2017	J	`jnl`	An Information Theoretic Framework for Active De-anonymization in Social Networks Based on Group Memberships. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2017	—	`conf`	An information theoretic framework for active de-anonymization in social networks based on group memberships. Allerton Farhad Shirani, Siddharth Garg, Elza Erkip
2017	J	`jnl`	BadNets: Identifying Vulnerabilities in the Machine Learning Model Supply Chain. CoRR Tianyu Gu, Brendan Dolan-Gavitt, Siddharth Garg
2017	A	`conf`	BandiTS: Dynamic timing speculation using multi-armed bandit based optimization. DATE Jeff Jun Zhang, Siddharth Garg
2017	J	`jnl`	Computing in the Dark Silicon Era: Current Trends and Research Challenges. IEEE Des. Test Muhammad Shafique, Siddharth Garg
2017	J	`jnl`	Guest Editors' Introduction: Computing in the Dark Silicon Era. IEEE Des. Test Muhammad Shafique, Siddharth Garg, Vikas Chandra
2017	A	`conf`	Inspiring trust in outsourced integrated circuit fabrication. DATE Siddharth Garg
2017	J	`jnl`	IoT-enabled Distributed Cyber-attacks on Transmission and Distribution Grids. CoRR Yury Dvorkin, Siddharth Garg
2017	J	`jnl`	Logic Locking for Secure Outsourced Chip Fabrication: A New Attack and Provably Secure Defense Mechanism. CoRR Mohamed El Massad, Jun Zhang, Siddharth Garg, Mahesh V. Tripunitara
2017	J	`jnl`	Optimal Checkpointing for Secure Intermittently-Powered IoT Devices. CoRR Zahra Ghodsi, Siddharth Garg, Ramesh Karri
2017	A	`conf`	Optimal checkpointing for secure intermittently-powered IoT devices. ICCAD Zahra Ghodsi, Siddharth Garg, Ramesh Karri
2017	J	`jnl`	Rethinking Split Manufacturing: An Information-Theoretic Approach with Secure Layout Techniques. CoRR Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
2017	A	`conf`	Rethinking split manufacturing: An information-theoretic approach with secure layout techniques. ICCAD Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
2017	J	`jnl`	Reverse Engineering Camouflaged Sequential Integrated Circuits Without Scan Access. CoRR Mohamed El Massad, Siddharth Garg, Mahesh Tripunitara
2017	A	`conf`	Reverse engineering camouflaged sequential circuits without scan access. ICCAD Mohamed El Massad, Siddharth Garg, Mahesh Tripunitara
2017	—	`conf`	SafetyNets: Verifiable Execution of Deep Neural Networks on an Untrusted Cloud. NIPS Zahra Ghodsi, Tianyu Gu, Siddharth Garg
2017	J	`jnl`	SafetyNets: Verifiable Execution of Deep Neural Networks on an Untrusted Cloud. CoRR Zahra Ghodsi, Tianyu Gu, Siddharth Garg
2017	J	`jnl`	Seeded Graph Matching: Efficient Algorithms and Theoretical Guarantees. CoRR Farhad Shirani, Siddharth Garg, Elza Erkip
2017	Misc	`conf`	Seeded graph matching: Efficient algorithms and theoretical guarantees. ACSSC Farhad Shirani, Siddharth Garg, Elza Erkip
2017	—	`conf`	The Need for Declarative Properties in Digital IC Security. ACM Great Lakes Symposium on VLSI Mohamed El Massad, Frank Imeson, Siddharth Garg, Mahesh Tripunitara
2017	J	`jnl`	Thread Progress Equalization: Dynamically Adaptive Power-Constrained Performance Optimization of Multi-Threaded Applications. IEEE Trans. Computers Yatish Turakhia, Guangshuo Liu, Siddharth Garg, Diana Marculescu
2016	—	`conf`	Can flexible, domain specific programmable logic prevent IP theft? DFT Xiaotong Cui, Kaijie Wu, Siddharth Garg, Ramesh Karri
2016	J	`jnl`	Energy Storage and Regulation: An Analysis. IEEE Trans. Smart Grid Dariush Fooladivanda, Catherine Rosenberg, Siddharth Garg
2016	J	`jnl`	Fragility of the commons under prospect-theoretic risk attitudes. Games Econ. Behav. Ashish Ranjan Hota, Siddharth Garg, Shreyas Sundaram
2016	J	`jnl`	Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ermao Cai, Da-Cheng Juan, Siddharth Garg, Jinpyo Park, Diana Marculescu
2016	—	`conf`	Non-Deterministic Timers for Hardware Trojan Activation (or How a Little Randomness Can Go the Wrong Way). WOOT Frank Imeson, Saeed Nejati, Siddharth Garg, Mahesh V. Tripunitara
2016	J	`jnl`	Optimal De-Anonymization in Random Graphs with Community Structure. CoRR Efe Onaran, Siddharth Garg, Elza Erkip
2016	Misc	`conf`	Optimal de-anonymization in random graphs with community structure. ACSSC Efe Onaran, Siddharth Garg, Elza Erkip
2016	—	`conf`	Optimal de-anonymization in random graphs with community structure. Sarnoff Symposium Efe Onaran, Siddharth Garg, Elza Erkip
2016	C	`conf`	Power-aware virtual machine mapping in the data-center-on-a-chip paradigm. ICCD Xue Lin, Yuankun Xue, Paul Bogdan, Yanzhi Wang, Siddharth Garg, Massoud Pedram
2016	A*	`conf`	Synergistic timing speculation for multi-threaded programs. DAC Atif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty
2016	J	`jnl`	Thread Progress Equalization: Dynamically Adaptive Power and Performance Optimization of Multi-threaded Applications. CoRR Yatish Turakhia, Guangshuo Liu, Siddharth Garg, Diana Marculescu
2016	—	`conf`	Threshold-Dependent Camouflaged Cells to Secure Circuits Against Reverse Engineering Attacks. ISVLSI Maria I. Mera Collantes, Mohamed El Massad, Siddharth Garg
2016	J	`jnl`	Threshold-Dependent Camouflaged Cells to Secure Circuits Against Reverse Engineering Attacks. CoRR Maria I. Mera Collantes, Mohamed El Massad, Siddharth Garg
2016	J	`jnl`	Variability and Reliability Awareness in the Age of Dark Silicon. IEEE Des. Test Florian Kriebel, Muhammad Shafique, Semeen Rehman, Jörg Henkel, Siddharth Garg
2016	A*	`conf`	Verifiable ASICs. IEEE Symposium on Security and Privacy Riad S. Wahby, Max Howald, Siddharth Garg, Abhi Shelat, Michael Walfish
2015	Misc	`ed.`	2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2015, Amsterdam, The Netherlands, October 4-9, 2015 CASES Ravi Iyer, Siddharth Garg
2015	—	`conf`	Analysis of energy- and SoC-neutral contracts for frequency regulation with energy storage. SmartGridComm Dariush Fooladivanda, Catherine Rosenberg, Siddharth Garg
2015	—	`conf`	Dark Silicon: From Computation to Communication. NOCS Jörg Henkel, Haseeb Bokhari, Siddharth Garg, Muhammad Usman Karim Khan, Heba Khdr, Florian Kriebel, Ümit Y. Ogras, Sri Parameswaran, Muhammad Shafique
2015	A	`conf`	Energy efficient scheduling for web search on heterogeneous microservers. ISLPED Sankalp Jain, Harshad Navale, Ümit Y. Ogras, Siddharth Garg
2015	—	`conf`	Energy-efficient computing from systems-on-chip to micro-server and data centers. IGSC Paul Bogdan, Siddharth Garg, Ümit Y. Ogras
2015	A*	`conf`	Integrated Circuit (IC) Decamouflaging: Reverse Engineering Camouflaged ICs within Minutes. NDSS Mohamed El Massad, Siddharth Garg, Mahesh V. Tripunitara
2015	A	`conf`	Variability-aware dark silicon management in on-chip many-core systems. DATE Muhammad Shafique, Dennis Gnad, Siddharth Garg, Jörg Henkel
2015	J	`jnl`	Verifiable ASICs. IACR Cryptol. ePrint Arch. Riad S. Wahby, Max Howald, Siddharth Garg, Abhi Shelat, Michael Walfish
2014	—	`conf`	An analysis of energy storage and regulation. SmartGridComm Dariush Fooladivanda, Catherine Rosenberg, Siddharth Garg
2014	Misc	`conf`	Dark silicon as a challenge for hardware/software co-design. CODES+ISSS Muhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel
2014	J	`jnl`	Fragility of the Commons under Prospect-Theoretic Risk Attitudes. CoRR Ashish Ranjan Hota, Siddharth Garg, Shreyas Sundaram
2014	Misc	`conf`	Job arrival rate aware scheduling for asymmetric multi-core servers in the dark silicon era. CODES+ISSS Bharathwaj Raghunathan, Siddharth Garg
2014	J	`jnl`	Reliable Computing with Ultra-Reduced Instruction Set Coprocessors. IEEE Micro Dan Wang, Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg
2014	A	`conf`	Shielding and securing integrated circuits with sensors. ICCAD Davood Shahrjerdi, Jeyavijayan Rajendran, Siddharth Garg, Farinaz Koushanfar, Ramesh Karri
2014	J	`jnl`	State of Charge Evolution Equations for Flywheels. CoRR Dariush Fooladivanda, Guillaume Mancini, Siddharth Garg, Catherine Rosenberg
2014	J	`jnl`	Statistical Peak Temperature Prediction and Thermal Yield Improvement for 3D Chip Multiprocessors. ACM Trans. Design Autom. Electr. Syst. Da-Cheng Juan, Siddharth Garg, Diana Marculescu
2014	A*	`conf`	The EDA Challenges in the Dark Silicon Era: Temperature, Reliability, and Variability Perspectives. DAC Muhammad Shafique, Siddharth Garg, Jörg Henkel, Diana Marculescu
2013	J	`jnl`	A Hybrid Amplitude/Time Encoding Scheme for Enhancing Coding Efficiency and Dynamic Range in Digitally Modulated Power Amplifiers. IEEE J. Emerg. Sel. Topics Circuits Syst. Peter Jingjing Xia, Siddharth Garg, Slim Boumaiza
2013	J	`jnl`	Addressing Process Variations at the Microarchitecture and System Level. Found. Trends Electron. Des. Autom. Siddharth Garg, Diana Marculescu
2013	A	`conf`	Cherry-picking: exploiting process variations in dark-silicon homogeneous chip multi-processors. DATE Bharathwaj Raghunathan, Yatish Turakhia, Siddharth Garg, Diana Marculescu
2013	A*	`conf`	HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors. DAC Yatish Turakhia, Bharathwaj Raghunathan, Siddharth Garg, Diana Marculescu
2013	C	`conf`	Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions. ISCAS Da-Cheng Juan, Siddharth Garg, Diana Marculescu
2013	Misc	`conf`	Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling. CODES+ISSS Da-Cheng Juan, Siddharth Garg, Jinpyo Park, Diana Marculescu
2013	A	`conf`	Low cost permanent fault detection using ultra-reduced instruction set co-processors. DATE Sundaram Ananthanarayanan, Siddharth Garg, Hiren D. Patel
2013	J	`jnl`	Mitigating the Impact of Process Variation on the Performance of 3-D Integrated Circuits. IEEE Trans. Very Large Scale Integr. Syst. Siddharth Garg, Diana Marculescu
2013	—	`conf`	Resource sharing games with failures and heterogeneous risk attitudes. Allerton Ashish Ranjan Hota, Siddharth Garg, Shreyas Sundaram
2013	A*	`conf`	Securing Computer Hardware Using 3D Integrated Circuit (IC) Technology and Split Manufacturing for Obfuscation. USENIX Security Symposium Frank Imeson, Ariq Emtenan, Siddharth Garg, Mahesh V. Tripunitara
2013	C	`conf`	Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design. VLSI-SoC Amr M. S. Tosson, Siddharth Garg, Mohab H. Anis
2013	—	`conf`	Vertically-addressed test structures (VATS) for 3D IC variability and stress measurements. ISQED Conor O'Sullivan, Peter M. Levine, Siddharth Garg
2012	—	`conf`	Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms. ISQED Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings
2012	A	`conf`	EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). FPGA Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings
2012	B	`conf`	EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip. FPL Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings
2012	J	`jnl`	Exploiting Process Variability in Voltage/Frequency Control. IEEE Trans. Very Large Scale Integr. Syst. Sebastian Herbert, Siddharth Garg, Diana Marculescu
2012	J	`jnl`	On the Impact of Manufacturing Process Variations on the Lifetime of Sensor Networks. ACM Trans. Embed. Comput. Syst. Siddharth Garg, Diana Marculescu
2012	A*	`conf`	Reliable computing with ultra-reduced instruction set co-processors. DAC Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg
2012	J	`jnl`	System-Level Leakage Variability Mitigation for MPSoC Platforms Using Body-Bias Islands. IEEE Trans. Very Large Scale Integr. Syst. Siddharth Garg, Diana Marculescu
2012	J	`jnl`	Technology-driven limits on runtime power management algorithms for multiprocessor systems-on-chip. ACM J. Emerg. Technol. Comput. Syst. Siddharth Garg, Diana Marculescu, Radu Marculescu
2011	J	`jnl`	Robust heterogeneous data center design: a principled approach. SIGMETRICS Perform. Evaluation Rev. Siddharth Garg, Shreyas Sundaram, Hiren D. Patel
2011	Misc	`conf`	Special session 4A: New topics parametric yield and reliability of 3D integrated circuits: New challenges and solutions. VTS Siddharth Garg, Diana Marculescu
2011	A	`conf`	Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations. DATE Da-Cheng Juan, Siddharth Garg, Diana Marculescu
2010	A	`conf`	Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. ISLPED Siddharth Garg, Diana Marculescu, Radu Marculescu
2010	A	`conf`	Process variation aware performance modeling and dynamic power management for multi-core systems. ICCAD Siddharth Garg, Diana Marculescu, Sebastian Herbert
2009	—	`conf`	3D-GCP: An analytical model for the impact of process variations on the critical path delay distribution of 3D ICs. ISQED Siddharth Garg, Diana Marculescu
2009	A	`conf`	System-level process variability analysis and mitigation for 3D MPSoCs. DATE Siddharth Garg, Diana Marculescu
2009	A*	`conf`	Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective. DAC Siddharth Garg, Diana Marculescu, Radu Marculescu, Ümit Y. Ogras
2008	J	`jnl`	Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Diana Marculescu, Siddharth Garg
2008	Misc	`conf`	System-level mitigation of WID leakage power variability using body-bias islands. CODES+ISSS Siddharth Garg, Diana Marculescu
2008	J	`jnl`	System-level throughput analysis for process variation aware multiple voltage-frequency island designs. ACM Trans. Design Autom. Electr. Syst. Siddharth Garg, Diana Marculescu
2008	B	`conf`	Voting-based active contour segmentation of fMRI images of the brain. ICIP Gowri Srinivasa, Vivek S. Oak, Siddharth Garg, Matthew C. Fickus, Jelena Kovacevic
2007	A	`conf`	Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs. DATE Siddharth Garg, Diana Marculescu
2007	Misc	`conf`	On the impact of manufacturing process variations on the lifetime of sensor networks. CODES+ISSS Siddharth Garg, Diana Marculescu
2006	A	`conf`	System-level process-driven variability analysis for single and multiple voltage-frequency island systems. ICCAD Diana Marculescu, Siddharth Garg
2004	C	`conf`	Static Transition Probability Analysis Under Uncertainty. ICCD Siddharth Garg, Siddharth Tata, Ravishankar Arunachalam