Shuvra S. Bhattacharyya

338 papers A* 6A 13B 12C 26Misc 32Journal 124Unranked 115

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	AutoComPose: Automatic Generation of Pose Transition Descriptions for Composed Pose Retrieval Using Multimodal LLMs. CoRR Yi-Ting Shen, Sungmin Eum, Doheon Lee, Rohit Shete, Chiao-Yi Wang, Heesung Kwon, Shuvra S. Bhattacharyya
2025	—	`conf`	Comparative Study of Memory Optimization Techniques for Dataflow-Modeled Applications. DASIP Naouel Haggui, Maxime Pelcat, Yaesop Lee, Shuvra S. Bhattacharyya, Kevin J. M. Martin, Jean-François Nezan
2025	J	`jnl`	DensePoseGait: Dense Human Pose Part-Guided for Gait Recognition. IEEE Trans. Biom. Behav. Identity Sci. Rijun Liao, Zhu Li, Shuvra S. Bhattacharyya, George York
2025	J	`jnl`	Edge-PRUNE: A Dataflow-Based Framework for Distributed Signal Processing and Machine Learning. IEEE Trans. Signal Process. Jani Boutellier, Bo Tan, Jari Nurmi, Shuvra S. Bhattacharyya
2025	J	`jnl`	Efficient Hyperspectral Image Classification Using Discrete Cosine Transform on Limited-Resource Systems. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Eungjoo Lee, Lei Pan, Zhu Li, Shuvra S. Bhattacharyya
2025	J	`jnl`	Real-time Fixed Priority Scheduling Synthesis Using Affine DataFlow Graphs: from Theory to Practice. ACM Trans. Embed. Comput. Syst. Alexandre Honorat, Hai Nam Tran, Thierry Gautier, Loïc Besnard, Shuvra S. Bhattacharyya, Jean-Pierre Talpin
2025	J	`jnl`	ShaderNN: A lightweight and efficient inference engine for real-time applications on mobile GPUs. Neurocomputing Jing Xie, Yuzhong Yan, Abhishek Saxena, Qiang Qiu, Jiangong Chen, Hongyu Sun, Rong Chen, Shuvra S. Bhattacharyya
2025	J	`jnl`	Tools and Methodologies for System-Level Design. CoRR Shuvra S. Bhattacharyya, Marilyn Wolf
2025	B	`conf`	Towards Incorporating Social and Spatial Dependencies in Machine Learning Models for Crime Prediction. SMC Xiaowen Qi, Kiminori Nakamura, Shuvra S. Bhattacharyya
2024	B	`conf`	Balancing Fairness and Accuracy for Predictive Models in Criminal Justice Applications Using Multi-Objective Optimization Methods. SMC Xiaowen Qi, Yujunrong Ma, Kiminori Nakamura, Shuvra S. Bhattacharyya
2024	J	`jnl`	Diversifying Human Pose in Synthetic Data for Aerial-view Human Detection. CoRR Yi-Ting Shen, Hyungtae Lee, Heesung Kwon, Shuvra S. Bhattacharyya
2024	J	`jnl`	Exploring the Impact of Synthetic Data for Aerial-view Human Detection. CoRR Hyungtae Lee, Yan Zhang, Yi-Ting Shen, Heesung Kwon, Shuvra S. Bhattacharyya
2024	B	`conf`	Exploring the Potential of Synthetic Data to Replace Real Data. ICIP Hyungtae Lee, Yan Zhang, Heesung Kwon, Shuvra S. Bhattacharyya
2024	A	`conf`	HashReID: Dynamic Network with Binary Codes for Efficient Person Re-identification. WACV Kshitij Nikhal, Yujunrong Ma, Shuvra S. Bhattacharyya, Benjamin S. Riggan
2024	J	`jnl`	HoloCamera: Advanced Volumetric Capture for Cinematic-Quality VR Applications. IEEE Trans. Vis. Comput. Graph. Jonathan Heagerty, Sida Li, Eric Lee, Shuvra S. Bhattacharyya, Sujal Bista, Barbara Brawn, Brandon Y. Feng, Susmija Jabbireddy, Joseph F. JáJá, Hernisa Kacorri, David Li, Derek Yarnell, Matthias Zwicker, Amitabh Varshney
2024	—	`conf`	Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications. DASIP Joseph W. Faye, Naouel Haggui, Florent Kermarrec, Kevin J. M. Martin, Shuvra S. Bhattacharyya, Jean-François Nezan, Maxime Pelcat
2024	J	`jnl`	SynPlay: Importing Real-world Diversity for a Synthetic Human Dataset. CoRR Jinsub Yim, Hyungtae Lee, Sungmin Eum, Yi-Ting Shen, Yan Zhang, Heesung Kwon, Shuvra S. Bhattacharyya
2024	B	`conf`	View DiffGait: View Pyramid Diffusion for Gait Recognition. FG Rijun Liao, Zhu Li, Shuvra S. Bhattacharyya, George York
2023	J	`jnl`	A parameter-optimization framework for neural decoding systems. Frontiers Neuroinformatics Jing Xie, Rong Chen, Shuvra S. Bhattacharyya
2023	—	`conf`	Appearance Label Balanced Triplet Loss for Multi-modal Aerial View Object Classification. CVPR Workshops Raghunath Sai Puttagunta, Zhu Li, Shuvra S. Bhattacharyya, George York
2023	J	`jnl`	Archangel: A Hybrid UAV-Based Human Detection Benchmark With Position and Pose Metadata. IEEE Access Yi-Ting Shen, Yaesop Lee, Heesung Kwon, Damon M. Conover, Shuvra S. Bhattacharyya, Nikolas Vale, Joshua D. Gray, G. Jeremy Leong, Kenneth Evensen, Frank Skirlo
2023	Misc	`conf`	Dynamically Reconfigurable Perception using Dataflow Parameterization of Channel Attention. ACSSC Yujunrong Ma, Kshitij Nikhal, Jani Boutellier, Benjamin S. Riggan, Shuvra S. Bhattacharyya
2023	—	`conf`	Energy-Efficient Access Point Deployment for Industrial IoT Systems. IFIPIoT (1) Xiaowen Qi, Jing Geng, Mohamed Kashef, Shuvra S. Bhattacharyya, Richard Candell
2023	J	`jnl`	Flydeling: Streamlined Performance Models for Hardware Acceleration of CNNs through System Identification. ACM Trans. Model. Perform. Evaluation Comput. Syst. Walther Carballo-Hernández, Maxime Pelcat, Shuvra S. Bhattacharyya, Ricardo Carmona-Galán, François Berry
2023	J	`jnl`	HashReID: Dynamic Network with Binary Codes for Efficient Person Re-identification. CoRR Kshitij Nikhal, Yujunrong Ma, Shuvra S. Bhattacharyya, Benjamin S. Riggan
2023	Misc	`conf`	Multi-Objective Design Optimization for Image Classification Using Elastic Neural Networks. CISS Lei Pan, Yan Zhang, Yi Zhou, Heikki Huttunen, Shuvra S. Bhattacharyya
2023	A*	`conf`	Progressive Transformation Learning for Leveraging Virtual Images in Training. CVPR Yi-Ting Shen, Hyungtae Lee, Heesung Kwon, Shuvra S. Bhattacharyya
2023	B	`conf`	Towards Interpretable, Attention-Based Crime Forecasting. SMC Yujunrong Ma, Xiaowen Qi, Kiminori Nakamura, Shuvra S. Bhattacharyya
2022	J	`jnl`	Archangel: A Hybrid UAV-based Human Detection Benchmark with Position and Pose Metadata. CoRR Yi-Ting Shen, Yaesop Lee, Heesung Kwon, Damon M. Conover, Shuvra S. Bhattacharyya, Nikolas Vale, Joshua D. Gray, G. Jeremy Leong, Kenneth Evensen, Frank Skirlo
2022	B	`conf`	EADTC: An Approach to Interpretable and Accurate Crime Prediction. SMC Yujunrong Ma, Kiminori Nakamura, Eungjoo Lee, Shuvra S. Bhattacharyya
2022	—	`conf`	Exploiting Simplified Depth Estimation for Stereo-based 2D Object Detection. AIPR Yaesop Lee, Hyungtae Lee, Eungjoo Lee, Heesung Kwon, Shuvra S. Bhattacharyya
2022	J	`jnl`	Learning Compact DNN Models for Behavior Prediction from Neural Activity of Calcium Imaging. J. Signal Process. Syst. Xiaomin Wu, Da-Ting Lin, Rong Chen, Shuvra S. Bhattacharyya
2022	—	`conf`	Real-time Face Tracking Based on a Configurable Ensemble of Detectors. IEEECONF Eungjoo Lee, Alexander Mattingly, Heesung Kwon, Benjamin S. Riggan, Shuvra S. Bhattacharyya
2022	J	`jnl`	VR-PRUNE: Decidable Variable-Rate Dataflow for Signal Processing Systems. IEEE Trans. Signal Process. Jani Boutellier, Yujunrong Ma, Jiahao Wu, Mir Khan, Shuvra S. Bhattacharyya
2022	J	`jnl`	Validation of object detection in UAV-based images using synthetic data. CoRR Eungjoo Lee, Damon M. Conover, Shuvra S. Bhattacharyya, Heesung Kwon, Jason Hill, Kenneth Evensen
2021	—	`conf`	A Framework for Fixed Priority Periodic Scheduling Synthesis from Synchronous Data-Flow Graphs. SAMOS Hai Nam Tran, Alexandre Honorat, Shuvra S. Bhattacharyya, Jean-Pierre Talpin, Thierry Gautier, Loïc Besnard
2021	J	`jnl`	A novel view synthesis approach based on view space covering for gait recognition. Neurocomputing Rijun Liao, Weizhi An, Zhu Li, Shuvra S. Bhattacharyya
2021	C	`conf`	Aerial Image Classification with Label Splitting and Optimized Triplet Loss Learning. VCIP Rijun Liao, Zhu Li, Shuvra S. Bhattacharyya, George York
2021	J	`jnl`	CGMBE: a model-based tool for the design and implementation of real-time image processing applications on CPU-GPU platforms. J. Real Time Image Process. Jiahao Wu, Jing Xie, Alexandre Bardakoff, Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya
2021	—	`conf`	DCT-based Hyperspectral Image Classification on Resource-Constrained Platforms. WHISPERS Eungjoo Lee, Yi-Ting Shen, Lei Pan, Zhu Li, Shuvra S. Bhattacharyya
2021	C	`conf`	Feature Extraction and Classification for Communication Channels in Wireless Mechatronic Systems. WFCS Jing Geng, Mohamed Kashef, Richard Candell, Yongkang Liu, Karl Montgomery, Shuvra S. Bhattacharyya
2021	J	`jnl`	Hyperspectral Image Classification With Attention-Aided CNNs. IEEE Trans. Geosci. Remote. Sens. Renlong Hang, Zhu Li, Qingshan Liu, Pedram Ghamisi, Shuvra S. Bhattacharyya
2021	J	`jnl`	Neural decoding on imbalanced calcium imaging data with a network of support vector machines. Adv. Robotics Kyunghun Lee, Xiaomin Wu, Yaesop Lee, Da-Ting Lin, Shuvra S. Bhattacharyya, Rong Chen
2021	J	`jnl`	PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs. ACM Trans. Model. Perform. Evaluation Comput. Syst. Claudio Rubattu, Francesca Palumbo, Shuvra S. Bhattacharyya, Maxime Pelcat
2021	—	`conf`	PathTracing: Raising the Level of Understanding of Processing Latency in Heterogeneous MPSoCs. DroneSE/RAPIDO@HiPEAC Claudio Rubattu, Francesca Palumbo, Shuvra S. Bhattacharyya, Maxime Pelcat
2021	C	`conf`	Plug-and-Play Deblurring for Robust Object Detection. VCIP Gerald Xie, Zhu Li, Shuvra S. Bhattacharyya, Asif Mehmood
2021	J	`jnl`	Rapid Quality Assessment of Nonrigid Image Registration Based on Supervised Learning. J. Digit. Imaging Eungjoo Lee, William Plishker, Nobuhiko Hata, Paul B. Shyn, Stuart G. Silverman, Shuvra S. Bhattacharyya, Raj Shekhar
2020	Misc	`conf`	Decidable Variable-Rate Dataflow for Heterogeneous Signal Processing Systems. ICASSP Yujunrong Ma, Jiahao Wu, Shuvra S. Bhattacharyya, Jani Boutellier
2020	—	`conf`	Dynamic, Data-Driven Hyperspectral Image Classification on Resource-Constrained Platforms. DDDAS Lei Pan, Rijun Liao, Zhu Li, Shuvra S. Bhattacharyya
2020	C	`conf`	Efficient Model Solving for Markov Decision Processes. ISCC Adrian E. Sapio, Shuvra S. Bhattacharyya, Marilyn Wolf
2020	J	`jnl`	Hyperspectral Image Classification with Attention Aided CNNs. CoRR Renlong Hang, Zhu Li, Qingshan Liu, Pedram Ghamisi, Shuvra S. Bhattacharyya
2020	C	`conf`	Integrating Field Measurements into a Model-Based Simulator for Industrial Communication Networks. WFCS Jing Geng, Honglei Li, Mohamed Kashef, Yongkang Liu, Richard Candell, Shuvra S. Bhattacharyya
2020	J	`jnl`	Passive-Active Flowgraphs for Efficient Modeling and Design of Signal Processing Systems. J. Signal Process. Syst. Yaesop Lee, Yanzhou Liu, Karol Desnos, Lee Barford, Shuvra S. Bhattacharyya
2020	A	`conf`	Prinet: A Prior Driven Spectral Super-Resolution Network. ICME Renlong Hang, Zhu Li, Qingshan Liu, Shuvra S. Bhattacharyya
2020	J	`jnl`	Real-Time Neuron Detection and Neural Signal Extraction Platform for Miniature Calcium Imaging. Frontiers Comput. Neurosci. Yaesop Lee, Jing Xie, Eungjoo Lee, Srijesh Sudarsanan, Da-Ting Lin, Rong Chen, Shuvra S. Bhattacharyya
2020	J	`jnl`	Research Challenges for Heterogeneous CPS Design. CoRR Shuvra S. Bhattacharyya, Marilyn Claire Wolf
2020	J	`jnl`	Research Challenges for Heterogeneous Cyberphysical System Design. Computer Shuvra S. Bhattacharyya, Marilyn Claire Wolf
2020	J	`jnl`	Runtime Adaptation in Wireless Sensor Nodes Using Structured Learning. CoRR Adrian E. Sapio, Shuvra S. Bhattacharyya, Marilyn Wolf
2020	J	`jnl`	Runtime Adaptation in Wireless Sensor Nodes Using Structured Learning. ACM Trans. Cyber Phys. Syst. Adrian E. Sapio, Shuvra S. Bhattacharyya, Marilyn Wolf
2020	Misc	`conf`	Scheduling of Synchronous Dataflow Graphs with Partially Periodic Real-Time Constraints. RTNS Alexandre Honorat, Karol Desnos, Shuvra S. Bhattacharyya, Jean-François Nezan
2020	—	`conf`	Simulating Spiking Neural Networks with Timed Dataflow Graphs. AICAS Lei Pan, François Christophe, Tommi Mikkonen, Zhu Li, Shuvra S. Bhattacharyya
2020	—	`conf`	Spectral Super Resolution with DCT Decomposition and Deep Residual Learning. DDDAS Raghunath Sai Puttagunta, Renlong Hang, Zhu Li, Shuvra S. Bhattacharyya, George York
2020	J	`jnl`	WGEVIA: A Graph Level Embedding Method for Microcircuit Data. Frontiers Comput. Neurosci. Xiaomin Wu, Shuvra S. Bhattacharyya, Rong Chen
2019	—	`conf`	A Framework for Design and Implementation of Adaptive Digital Predistortion Systems. AICAS Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya
2019	J	`jnl`	An integrated hardware/software design methodology for signal processing systems. J. Syst. Archit. Lin Li, Carlo Sau, Tiziana Fanni, Jingui Li, Timo Viitanen, François Christophe, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2019	C	`conf`	Design Space Exploration for Wireless-Integrated Factory Automation Systems. WFCS Honglei Li, Jing Geng, Yongkang Liu, Mohamed Kashef, Richard Candell, Shuvra S. Bhattacharyya
2019	—	`conf`	Elastic Neural Networks for Classification. AICAS Yi Zhou, Yue Bai, Shuvra S. Bhattacharyya, Heikki Huttunen
2019	—	`conf`	GEMBench: A Platform for Collaborative Development of GPU Accelerated Embedded Markov Decision Systems. SAMOS Adrian E. Sapio, Rocky L. Tatiefo, Shuvra S. Bhattacharyya, Marilyn Wolf
2019	Misc	`conf`	Gradient Image Super-resolution for Low-resolution Image Recognition. ICASSP Dewan Fahim Noor, Yue Li, Zhu Li, Shuvra S. Bhattacharyya, George York
2019	—	`conf`	Hyperspectral Video Processing on Resource-Constrained Platforms. WHISPERS Honglei Li, Lei Pan, Eungjoo Lee, Zhu Li, Matthew J. Hoffman, Anthony Vodacek, Shuvra S. Bhattacharyya
2019	B	`conf`	Incremental Deep Neural Network Pruning Based on Hessian Approximation. DCC Li Li, Zhu Li, Yue Li, Birendra Kathariya, Shuvra S. Bhattacharyya
2019	C	`conf`	Low Resolution Recognition of Aerial Images. VCIP Raghunath Sai Puttagunta, Renlong Hang, Zhu Li, Shuvra S. Bhattacharyya
2019	J	`jnl`	MADS: A Framework for Design and Implementation of Adaptive Digital Predistortion Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya
2019	J	`jnl`	Model-Based Dynamic Scheduling for Multicore Signal Processing. J. Signal Process. Syst. Jiahao Wu, Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya
2019	B	`conf`	Multi-Frame Super Resolution with Deep Residual Learning on Flow Registered Non-Integer Pixel Images. ICIP Dewan Fahim Noor, Li Li, Zhu Li, Shuvra S. Bhattacharyya
2019	J	`jnl`	Multi-Scale Gradient Image Super-Resolution for Preserving SIFT Key Points in Low-Resolution Images. Signal Process. Image Commun. Dewan Fahim Noor, Yue Li, Zhu Li, Shuvra S. Bhattacharyya, George York
2019	J	`jnl`	Optimized implementation of digital signal processing applications with gapless data acquisition. EURASIP J. Adv. Signal Process. Yanzhou Liu, Lee Barford, Shuvra S. Bhattacharyya
2019	—	`conf`	Real-Time Calcium Imaging Based Neural Decoding with a Support Vector Machine. BioCAS Kyunghun Lee, Yaesop Lee, Da-Ting Lin, Shuvra S. Bhattacharyya, Rong Chen
2019	—	`conf`	Segmentation of surgical instruments in laparoscopic videos: training dataset generation and deep-learning-based framework. Image-Guided Procedures Eungjoo Lee, William Plishker, Xinyang Liu, Timothy D. Kane, Shuvra S. Bhattacharyya, Raj Shekhar
2018	Misc	`conf`	A Joint Target Localization and Classification Framework for Sensor Networks. ICASSP Kyunghun Lee, Benjamin S. Riggan, Shuvra S. Bhattacharyya
2018	A	`conf`	A design tool for high performance image processing on multicore platforms. DATE Jiahao Wu, Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya
2018	—	`ch.`	Design of a Dynamic Data-Driven System for Multispectral Video Processing. Handbook of Dynamic Data Driven Applications Systems Honglei Li, Yanzhou Liu, Kishan Sudusinghe, Jinsung Yoon, Erik Blasch, Mihaela van der Schaar, Shuvra S. Bhattacharyya
2018	—	`ch.`	Dynamic Data Driven Application Systems (DDDAS) for Multimedia Content Analysis. Handbook of Dynamic Data Driven Applications Systems Erik Blasch, Alex Aved, Shuvra S. Bhattacharyya
2018	—	`conf`	Efficient Solving of Markov Decision Processes on GPUs Using Parallelized Sparse Matrices. DASIP Adrian E. Sapio, Shuvra S. Bhattacharyya, Marilyn Wolf
2018	J	`jnl`	Elastic Neural Networks for Classification. CoRR Yi Zhou, Yue Bai, Shuvra S. Bhattacharyya, Heikki Huttunen
2018	—	`conf`	Elastic Neural Networks: A Scalable Framework for Embedded Computer Vision. EUSIPCO Yue Bai, Shuvra S. Bhattacharyya, Antti P. Happonen, Heikki Huttunen
2018	J	`jnl`	Elastic Neural Networks: A Scalable Framework for Embedded Computer Vision. CoRR Yue Bai, Shuvra S. Bhattacharyya, Antti P. Happonen, Heikki Huttunen
2018	—	`conf`	Generalized Graph Connections for Dataflow Modeling of DSP Applications. SiPS Yanzhou Liu, Lee Barford, Shuvra S. Bhattacharyya
2018	J	`jnl`	Memory-Constrained Vectorization and Scheduling of Dataflow Graphs for Hybrid CPU-GPU Platforms. ACM Trans. Embed. Comput. Syst. Shuoxin Lin, Jiahao Wu, Shuvra S. Bhattacharyya
2018	—	`conf`	Model-Based Representations for Dataflow Schedules. Principles of Modeling Shuvra S. Bhattacharyya, Johan Lilius
2018	C	`conf`	Model-based cosimulation for industrial wireless networks. WFCS Jing Geng, Honglei Li, Yanzhou Liu, Yongkang Liu, Mohamed Kashef, Richard Candell, Shuvra S. Bhattacharyya
2018	J	`jnl`	PRUNE: Dynamic and Decidable Dataflow for Signal Processing on Heterogeneous Platforms. CoRR Jani Boutellier, Jiahao Wu, Heikki Huttunen, Shuvra S. Bhattacharyya
2018	J	`jnl`	PRUNE: Dynamic and Decidable Dataflow for Signal Processing on Heterogeneous Platforms. IEEE Trans. Signal Process. Jani Boutellier, Jiahao Wu, Heikki Huttunen, Shuvra S. Bhattacharyya
2018	J	`jnl`	Reconfigurable Digital Channelizer Design Using Factored Markov Decision Processes. J. Signal Process. Syst. Adrian E. Sapio, Lin Li, Jiahao Wu, Marilyn Wolf, Shuvra S. Bhattacharyya
2018	J	`jnl`	Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Maxime Pelcat, Alexandre Mercat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Wassim Hamidouche, Daniel Ménard, Shuvra S. Bhattacharyya
2018	C	`conf`	Toward Efficient Many-core Scheduling of Partial Expansion Graphs. SCOPES Hai Nam Tran, Shuvra S. Bhattacharyya, Jean-Pierre Talpin, Thierry Gautier
2017	J	`jnl`	A Hybrid Task Graph Scheduler for High Performance Image Processing Workflows. J. Signal Process. Syst. Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya, Milton Halem, Mary Brady
2017	Misc	`conf`	An accumulative fusion architecture for discriminating people and vehicles using acoustic and seismic signals. ICASSP Kyunghun Lee, Benjamin S. Riggan, Shuvra S. Bhattacharyya
2017	—	`conf`	An optimized embedded target detection system using acoustic and seismic sensors. EUSIPCO Kyunghun Lee, Benjamin S. Riggan, Shuvra S. Bhattacharyya
2017	J	`jnl`	Data Flow Algorithms for Processors with Vector Extensions - Handling Actors With Internal State. J. Signal Process. Syst. Lee Barford, Shuvra S. Bhattacharyya, Yanzhou Liu
2017	—	`conf`	Design and implementation of a multi-mode harris corner detector architecture. NORCAS Jingui Li, Timo Viitanen, Lin Li, Jarmo Takala, Shuvra S. Bhattacharyya
2017	—	`conf`	Design and implementation of adaptive signal processing systems using Markov decision processes. ASAP Lin Li, Adrian E. Sapio, Jiahao Wu, Yanzhou Liu, Kyunghun Lee, Marilyn Wolf, Shuvra S. Bhattacharyya
2017	J	`jnl`	Evolutionary Multiobjective Optimization for Adaptive Dataflow-based Digital Predistortion Architectures. EAI Endorsed Trans. Cogn. Commun. Lin Li, Amanullah Ghazi, Jani Boutellier, Lauri Anttila, Mikko Valkama, Shuvra S. Bhattacharyya
2017	J	`jnl`	Hardware design methodology using lightweight dataflow and its integration with low power techniques. J. Syst. Archit. Tiziana Fanni, Lin Li, Timo Viitanen, Carlo Sau, Renjie Xie, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2017	J	`jnl`	Implementation of a Multirate Resampler for Multi-carrier Systems on GPUs. J. Signal Process. Syst. Scott C. Kim, Shuvra S. Bhattacharyya
2017	J	`jnl`	Implementation, Scheduling, and Adaptation of Partial Expansion Graphs on Multicore Platforms. J. Signal Process. Syst. George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Frank Fruth
2017	—	`ch.`	Introduction to Hardware/Software Codesign. Handbook of Hardware/Software Codesign Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya
2017	—	`conf`	Low-power heterogeneous computing via adaptive execution of dataflow actors. SiPS Jani Boutellier, Shuvra S. Bhattacharyya
2017	—	`conf`	Model-based dynamic scheduling for multicore implementation of image processing systems. SiPS Jiahao Wu, Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya
2017	—	`conf`	Online learning in neural decoding using incremental linear discriminant analysis. CBS Yaesop Lee, Sreenuj Chellath Madayambath, Yanzhou Liu, Da-Ting Lin, Rong Chen, Shuvra S. Bhattacharyya
2017	—	`ch.`	The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems. Handbook of Hardware/Software Codesign Shuoxin Lin, Yanzhou Liu, Kyunghun Lee, Lin Li, William Plishker, Shuvra S. Bhattacharyya
2016	C	`conf`	A Design Framework for Mapping Vectorized Synchronous Dataflow Graphs onto CPU-GPU Platforms. SCOPES Shuoxin Lin, Yanzhou Liu, William Plishker, Shuvra S. Bhattacharyya
2016	J	`jnl`	A Wideband Front-End Receiver Implementation on GPUs. IEEE Trans. Signal Process. Scott C. Kim, Shuvra S. Bhattacharyya
2016	J	`jnl`	Adaptive tracking of people and vehicles using mobile platforms. EURASIP J. Adv. Signal Process. Haifa Ben Salem, Thyagaraju Damarla, Kishan Sudusinghe, Walter Stechele, Shuvra S. Bhattacharyya
2016	—	`conf`	Compact modeling and management of reconfiguration in digital channelizer implementation. GlobalSIP Adrian E. Sapio, Marilyn Wolf, Shuvra S. Bhattacharyya
2016	—	`conf`	Design space exploration and constrained multiobjective optimization for digital predistortion systems. ASAP Lin Li, Amanullah Ghazi, Jani Boutellier, Lauri Anttila, Mikko Valkama, Shuvra S. Bhattacharyya
2016	—	`conf`	Evolutionary Multiobjective Optimization for Digital Predistortion Architectures. CrownCom Lin Li, Amanullah Ghazi, Jani Boutellier, Lauri Anttila, Mikko Valkama, Shuvra S. Bhattacharyya
2016	J	`jnl`	Instrumentation-Driven Validation of Dataflow Applications. J. Signal Process. Syst. Ilya Chukhman, Yang Jiao, Haifa Ben Salem, Shuvra S. Bhattacharyya
2016	—	`conf`	Jitter measurement on deep waveforms with constant memory. I2MTC Yanzhou Liu, Lee Barford, Shuvra S. Bhattacharyya
2016	—	`conf`	Low power design methodology for signal processing systems using lightweight dataflow techniques. DASIP Lin Li, Tiziana Fanni, Timo Viitanen, Renjie Xie, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2016	—	`conf`	Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems. SiPS Maxime Pelcat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Shuvra S. Bhattacharyya
2016	—	`conf`	Power and Thermal Modeling for Communication Systems. SiPS Marilyn Wolf, Shuvra S. Bhattacharyya, Jacques Florence, Adrian E. Sapio
2016	—	`conf`	Prototyping real-time tracking systems on mobile devices. Conf. Computing Frontiers Kyunghun Lee, Haifa Ben Salem, Thyagaraju Damarla, Walter Stechele, Shuvra S. Bhattacharyya
2016	—	`conf`	Resource-constrained implementation and optimization of a deep neural network for vehicle classification. EUSIPCO Renjie Xie, Heikki Huttunen, Shuoxin Lin, Shuvra S. Bhattacharyya, Jarmo Takala
2016	J	`jnl`	Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing. J. Signal Process. Syst. Zheng Zhou, William Plishker, Shuvra S. Bhattacharyya, Karol Desnos, Maxime Pelcat, Jean-François Nezan
2015	—	`conf`	A hybrid task graph scheduler for high performance image processing workflows. GlobalSIP Timothy Blattner, Walid Keyrouz, Milton Halem, Mary Brady, Shuvra S. Bhattacharyya
2015	—	`conf`	An efficient GPU implementation of a multirate resampler for multi-carrier systems. GlobalSIP Scott C. Kim, Shuvra S. Bhattacharyya
2015	—	`conf`	Constant-rate clock recovery and jitter measurement on deep memory waveforms using dataflow. I2MTC Yanzhou Liu, Lee Barford, Shuvra S. Bhattacharyya
2015	—	`conf`	Model-based design and implementation of an adaptive digital predistortion filter. SiPS Amanullah Ghazi, Jani Boutellier, Olli Silvén, Shahriar Shahabuddin, Markku J. Juntti, Shuvra S. Bhattacharyya, Lauri Anttila
2015	Misc	`conf`	Multiobjective Design Optimization in the Lightweight Dataflow for DDDAS Environment (LiD4E) ICCS Kishan Sudusinghe, Yang Jiao, Haifa Ben Salem, Mihaela van der Schaar, Shuvra S. Bhattacharyya
2015	J	`jnl`	Parameterized Sets of Dataflow Modes And Their Application to Implementation of Cognitive Radio Systems. J. Signal Process. Syst. Shuoxin Lin, Lai-Huei Wang, Aida Vosoughi, Joseph R. Cavallaro, Markku J. Juntti, Jani Boutellier, Olli Silvén, Mikko Valkama, Shuvra S. Bhattacharyya
2014	—	`conf`	Data flow algorithms for processors with vector extensions: Handling actors with internal state. GlobalSIP Lee Barford, Shuvra S. Bhattacharyya, Yanzhou Liu
2014	—	`ch.`	Dataflow-Based, Cross-Platform Design Flow for DSP Applications. Embedded Systems Development, From Functional Models to Implementations Zheng Zhou, Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya
2014	Misc	`conf`	Efficient architecture mapping of FFT/IFFT for cognitive radio networks. ICASSP Guohui Wang, Bei Yin, Inkeun Cho, Joseph R. Cavallaro, Shuvra S. Bhattacharyya, Jarmo Takala
2014	J	`jnl`	Implementation of a high-throughput low-latency polyphase channelizer on GPUs. EURASIP J. Adv. Signal Process. Scott C. Kim, Shuvra S. Bhattacharyya
2014	—	`conf`	Instrumentation-driven framework for validation of dataflow applications. SiPS Ilya Chukhman, Shuvra S. Bhattacharyya
2014	—	`conf`	Just-in-time scheduling techniques for multicore signal processing systems. GlobalSIP Julien Heulot, Maxime Pelcat, Jean-François Nezan, Yaset Oliva, Slaheddine Aridhi, Shuvra S. Bhattacharyya
2014	Misc	`conf`	Low power implementation of digital predistortion filter on a heterogeneous application specific multiprocessor. ICASSP Amanullah Ghazi, Jani Boutellier, Mahmoud Abdelaziz, Xiaojia Lu, Lauri Anttila, Joseph R. Cavallaro, Shuvra S. Bhattacharyya, Mikko Valkama, Markku J. Juntti
2014	—	`conf`	Low-complexity digital predistortion for reducing power amplifier spurious emissions in spectrally-agile flexible radio. CrownCom Mahmoud Abdelaziz, Lauri Anttila, Joseph R. Cavallaro, Shuvra S. Bhattacharyya, Abbas Mohammadi, Fadhel M. Ghannouchi, Markku J. Juntti, Mikko Valkama
2014	Misc	`conf`	Model Based Design Environment for Data-driven Embedded Signal Processing Systems. ICCS Kishan Sudusinghe, Inkeun Cho, Mihaela van der Schaar, Shuvra S. Bhattacharyya
2014	Misc	`conf`	Partial expansion of dataflow graphs for resource-aware scheduling of multicore signal processing systems. ACSSC George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Frank Fruth
2013	Misc	`conf`	A Design Methodology for Distributed Adaptive Stream Mining Systems. ICCS Stephen Won, Inkeun Cho, Kishan Sudusinghe, Jie Xu, Yu Zhang, Mihaela van der Schaar, Shuvra S. Bhattacharyya
2013	A	`conf`	A novel framework for design and implementation of adaptive stream mining systems. ICME Kishan Sudusinghe, Stephen Won, Mihaela van der Schaar, Shuvra S. Bhattacharyya
2013	Misc	`conf`	A system-level design approach for dynamic resource coordination and energy optimization in sensor network platforms. ACSSC Inkeun Cho, Kishan Sudusinghe, Chung-Ching Shen, Jonathan McGee, Shuvra S. Bhattacharyya
2013	—	`conf`	An efficient GPU implementation of an arbitrary resampling polyphase channelizer. DASIP Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya
2013	Misc	`conf`	Configurable, resource-optimized FFT architecture for OFDM communication. ICASSP Inkeun Cho, Chung-Ching Shen, Yahia Tachwali, Chia-Jui Hsu, Shuvra S. Bhattacharyya
2013	—	`conf`	Dataflow modeling and design for cognitive radio networks. CrownCom Lai-Huei Wang, Shuvra S. Bhattacharyya, Aida Vosoughi, Joseph R. Cavallaro, Markku J. Juntti, Jani Boutellier, Olli Silvén, Mikko Valkama
2013	—	`ch.`	Dynamic Dataflow Graphs. Handbook of Signal Processing Systems Shuvra S. Bhattacharyya, Ed F. Deprettere, Bart D. Theelen
2013	—	`book`	Handbook of Signal Processing Systems Handbook of Signal Processing Systems Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala
2013	J	`jnl`	High-performance and low-energy buffer mapping method for multiprocessor DSP systems. ACM Trans. Embed. Comput. Syst. Dongwon Lee, Marilyn Wolf, Shuvra S. Bhattacharyya
2013	J	`jnl`	Instrumentation-Driven Model Detection and Actor Partitioning for Dataflow Graphs. Int. J. Embed. Real Time Commun. Syst. Ilya Chukhman, Shuoxin Lin, William Plishker, Chung-Ching Shen, Shuvra S. Bhattacharyya
2013	J	`jnl`	Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio. J. Signal Process. Syst. George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall
2013	Misc	`conf`	Mobile transmitter digital predistortion: Feasibility analysis, algorithms and design exploration. ACSSC Mahmoud Abdelaziz, Amanullah Ghazi, Lauri Anttila, Jani Boutellier, Toni Lahteensuo, Xiaojia Lu, Joseph R. Cavallaro, Shuvra S. Bhattacharyya, Markku J. Juntti, Mikko Valkama
2013	J	`jnl`	Parameterized Scheduling of Topological Patterns in Signal Processing Dataflow Graphs. J. Signal Process. Syst. Lai-Huei Wang, Chung-Ching Shen, Shenpei Wu, Shuvra S. Bhattacharyya
2013	—	`conf`	Parameterized core functional dataflow graphs and their application to design and implementation of wireless communication systems. SiPS Lai-Huei Wang, Chung-Ching Shen, Shuvra S. Bhattacharyya
2013	—	`conf`	PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration. ICSAMOS Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi
2013	—	`conf`	Pipelined FFT for wireless communications supporting 128-2048 / 1536 -point transforms. GlobalSIP Inkeun Cho, Tomasz Patyk, David Guevorkian, Jarmo Takala, Shuvra S. Bhattacharyya
2013	—	`conf`	Scheduling of parallelized synchronous dataflow actors. ISSoC Zheng Zhou, Karol Desnos, Maxime Pelcat, Jean-François Nezan, William Plishker, Shuvra S. Bhattacharyya
2013	—	`conf`	Subcarrier allocation and power control with LTE-A carrier aggregation. GlobalSIP Xiaojia Lu, Markku J. Juntti, Janne Janhunen, Jani Boutellier, Mikko Valkama, Joseph R. Cavallaro, Shuvra S. Bhattacharyya
2012	J	`jnl`	Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format. IEEE Trans. Multim. Chung-Ching Shen, Shenpei Wu, Nimish Sane, Hsiang-Huang Wu, William Plishker, Shuvra S. Bhattacharyya
2012	—	`conf`	GPU-based acceleration of symbol timing recovery. DASIP Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya, Joseph R. Cavallaro
2012	J	`jnl`	Guest Editors' Introduction. J. Signal Process. Syst. Shuvra S. Bhattacharyya, Wonyong Sung, Jarmo Takala
2012	J	`jnl`	Guest Editors' Introduction. J. Signal Process. Syst. Jarmo Takala, Shuvra S. Bhattacharyya, Wonyong Sung
2012	—	`conf`	Instrumentation techniques for cyber-physical systems using the targeted dataflow interchange format. ICSAMOS Shuvra S. Bhattacharyya
2012	—	`conf`	Instrumentation-driven model detection for dataflow graphs. ISSoC Ilya Chukhman, William Plishker, Shuvra S. Bhattacharyya
2012	J	`jnl`	Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware. J. Signal Process. Syst. Hojin Kee, Chung-Ching Shen, Shuvra S. Bhattacharyya, Ian C. Wong, Yong Rao, Jacob Kornerup
2012	—	`conf`	Multidimensional Dataflow Graph Modeling and Mapping for Efficient GPU Implementation. SiPS Lai-Huei Wang, Chung-Ching Shen, Gunasekaran S. Seetharaman, Kannappan Palaniappan, Shuvra S. Bhattacharyya
2012	—	`conf`	NT-SIM: A co-simulator for networked signal processing applications. EUSIPCO Stephen Won, Chung-Ching Shen, Shuvra S. Bhattacharyya
2012	Misc	`conf`	Parameterized scheduling for signal processing systems using topological patterns. ICASSP Shenpei Wu, Chung-Ching Shen, Nimish Sane, Kelly Davis, Shuvra S. Bhattacharyya
2012	—	`conf`	Partial Expansion Graphs: Exposing Parallelism and Dynamic Scheduling Opportunities for DSP Applications. ASAP George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Frank Fruth
2012	—	`conf`	Preface. ICSAMOS John McAllister, Shuvra S. Bhattacharyya
2011	—	`conf`	A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs. IPDPS Workshops Hsiang-Huang Wu, Chung-Ching Shen, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya
2011	A	`conf`	A design tool for efficient mapping of multimedia applications onto heterogeneous platforms. ICME Chung-Ching Shen, Hsiang-Huang Wu, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya
2011	C	`conf`	Applying graphics processor acceleration in a software defined radio prototyping environment. International Symposium on Rapid System Prototyping William Plishker, George F. Zaki, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall
2011	B	`conf`	Design methods for Wireless Sensor Network Building Energy Monitoring Systems. LCN Inkeun Cho, Chung-Ching Shen, Siddharth Potbhare, Shuvra S. Bhattacharyya, Neil Goldsman
2011	J	`jnl`	Exploiting Statically Schedulable Regions in Dataflow Programs. J. Signal Process. Syst. Ruirui Gu, Jörn W. Janneck, Mickaël Raulet, Shuvra S. Bhattacharyya
2011	J	`jnl`	Heterogeneous Design in Functional DIF. Trans. High Perform. Embed. Archit. Compil. William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya
2011	—	`conf`	Methods for design and implementation of dynamic signal processing systems. ICSAMOS Shuvra S. Bhattacharyya
2011	—	`conf`	Model-based precision analysis and optimization for digital signal processors. EUSIPCO Soujanya Kedilaya, William Plishker, Aleksandar Purkovic, Brian Johnson, Shuvra S. Bhattacharyya
2011	B	`conf`	Modeling and optimization of dynamic signal processing in resource-aware sensor networks. AVSS Shuvra S. Bhattacharyya, William Plishker, Nimish Sane, Chung-Ching Shen, Hsiang-Huang Wu
2011	J	`jnl`	Multithreaded Simulation for Synchronous Dataflow Graphs. ACM Trans. Design Autom. Electr. Syst. Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya
2011	J	`jnl`	Overview of the MPEG Reconfigurable Video Coding Framework. J. Signal Process. Syst. Shuvra S. Bhattacharyya, Johan Eker, Jörn W. Janneck, Christophe Lucarz, Marco Mattavelli, Mickaël Raulet
2011	—	`conf`	Teaching cross-platform design and testing methods for embedded systems using DICE. WESE Shuvra S. Bhattacharyya, William Plishker, Ayush Gupta, Chung-Ching Shen
2011	J	`jnl`	Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs. J. Signal Process. Syst. Nimish Sane, Hojin Kee, Gunasekaran S. Seetharaman, Shuvra S. Bhattacharyya
2011	—	`conf`	Vectorization and mapping of software defined radio applications on heterogeneous multi-processor platforms. SiPS George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall
2010	J	`jnl`	A Low-overhead Scheduling Methodology for Fine-grained Acceleration of Signal Processing Systems. J. Signal Process. Syst. Jani Boutellier, Shuvra S. Bhattacharyya, Olli Silvén
2010	J	`jnl`	Analysis of SystemC actor networks for efficient synthesis. ACM Trans. Embed. Comput. Syst. Joachim Falk, Christian Zebelein, Joachim Keinert, Christian Haubelt, Jürgen Teich, Shuvra S. Bhattacharyya
2010	—	`conf`	Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementation. DASIP Ruirui Gu, Jonathan Piat, Mickaël Raulet, Jörn W. Janneck, Shuvra S. Bhattacharyya
2010	Misc	`conf`	Buffer management for multi-application image processing on multi-core platforms: Analysis and case study. ICASSP Dong-Ik Ko, Nara Won, Shuvra S. Bhattacharyya
2010	J	`jnl`	Design and implementation of embedded computer vision systems based on particle filters. Comput. Vis. Image Underst. Sankalita Saha, Neal K. Bambha, Shuvra S. Bhattacharyya
2010	—	`ch.`	Dynamic and Multidimensional Dataflow Graphs. Handbook of Signal Processing Systems Shuvra S. Bhattacharyya, Ed F. Deprettere, Joachim Keinert
2010	—	`conf`	Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs. ICSAMOS Hojin Kee, Shuvra S. Bhattacharyya, Jacob Kornerup
2010	J	`jnl`	Energy-driven distribution of signal processing applications across wireless sensor networks. ACM Trans. Sens. Networks Chung-Ching Shen, William Plishker, Dong-Ik Ko, Shuvra S. Bhattacharyya, Neil Goldsman
2010	Misc	`conf`	FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques. ICASSP Hojin Kee, Shuvra S. Bhattacharyya, Ian C. Wong, Yong Rao
2010	—	`book`	Handbook of Signal Processing Systems Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala
2010	—	`conf`	Loop transformations for interface-based hierarchies IN SDF graphs. ASAP Jonathan Piat, Shuvra S. Bhattacharyya, Mickaël Raulet
2010	C	`conf`	Methods for Efficient Implementation of Model Predictive Control on Multiprocessor Systems. CCA Ruirui Gu, Shuvra S. Bhattacharyya, William S. Levine
2010	C	`conf`	Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs. International Symposium on Rapid System Prototyping Hsiang-Huang Wu, Hojin Kee, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya
2010	Misc	`conf`	Simulating dynamic communication systems using the core functional dataflow model. ICASSP Nimish Sane, Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya
2010	J	`jnl`	Utilizing Hierarchical Multiprocessing for Medical Image Registration. IEEE Signal Process. Mag. William Plishker, Omkar Dandekar, Shuvra S. Bhattacharyya, Raj Shekhar
2009	A	`conf`	A generalized scheduling approach for dynamic dataflow applications. DATE William Plishker, Nimish Sane, Shuvra S. Bhattacharyya
2009	J	`jnl`	An architectural level design methodology for smart camera applications. Int. J. Embed. Syst. Sankalita Saha, Vida Kianzad, Jason Schlessman, Gaurav Aggarwal, Shuvra S. Bhattacharyya, Rama Chellappa, Wayne H. Wolf
2009	C	`conf`	Dataflow-based implementation of model predictive control. ACC Ruirui Gu, Shuvra S. Bhattacharyya, William S. Levine
2009	Misc	`conf`	Exploiting statically schedulable regions in dataflow programs. ICASSP Ruirui Gu, Jörn W. Janneck, Mickaël Raulet, Shuvra S. Bhattacharyya
2009	J	`jnl`	Exploring the Concurrency of an MPEG RVC Decoder Based on Dataflow Program Analysis. IEEE Trans. Circuits Syst. Video Technol. Ruirui Gu, Jörn W. Janneck, Shuvra S. Bhattacharyya, Mickaël Raulet, Matthieu Wipliez, William Plishker
2009	J	`jnl`	Guest Editorial: Special Issue on Multi-Core Enabled Multimedia Applications & Architectures. J. Signal Process. Syst. Yen-Kuang Chen, Lurng-Kuo Liu, Shuvra S. Bhattacharyya
2009	C	`conf`	High-Performance Buffer Mapping to Exploit DRAM Concurrency in Multiprocessor DSP Systems. IEEE International Workshop on Rapid System Prototyping Dongwon Lee, Shuvra S. Bhattacharyya, Wayne H. Wolf
2009	—	`conf`	Improving the performance of active set based Model Predictive Controls by dataflow methods. CDC Ruirui Gu, Shuvra S. Bhattacharyya, William S. Levine
2009	—	`conf`	Interface-based hierarchy for synchronous data-flow graphs. SiPS Jonathan Piat, Shuvra S. Bhattacharyya, Mickaël Raulet
2009	A*	`conf`	Mode grouping for more effective generalized scheduling of dynamic dataflow applications. DAC William Plishker, Nimish Sane, Shuvra S. Bhattacharyya
2009	—	`conf`	Real-Time Logic Verification of a Wireless Sensor Network. CSIE (3) Jennifer Green, Shuvra S. Bhattacharyya, Biswajit Panja
2009	—	`conf`	Resource-efficient acceleration of 2-dimensional Fast Fourier Transform computations on FPGAs. ICDSC Hojin Kee, Shuvra S. Bhattacharyya, Newton Petersen, Jacob Kornerup
2009	J	`jnl`	Special Issue on Selected Papers from BiOCAS 2008 Guest Editors' Introduction. IEEE Trans. Biomed. Circuits Syst. S.-H. Liu, Khaled N. Salama, Shuvra S. Bhattacharyya
2008	Misc	`conf`	A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications. EMSOFT Joachim Falk, Joachim Keinert, Christian Haubelt, Jürgen Teich, Shuvra S. Bhattacharyya
2008	J	`jnl`	Advances in hardware design and implementation of signal processing systems [DSP Forum]. IEEE Signal Process. Mag. Shuvra S. Bhattacharyya, Jeffery C. Bier, Wanda K. Gass, Ram K. Krishnamurthy, Edward A. Lee, Konstantinos Konstantinides
2008	A	`conf`	An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications. DATE Sankalita Saha, Jason Schlessman, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Wayne H. Wolf
2008	A	`conf`	Design and optimization of a distributed, embedded speech recognition system. IPDPS Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya
2008	—	`conf`	Energy efficient implementation of G.729 for wireless VoIP application. ICAIT Aihong Yao, Junjun Gu, Gang Qu, Shuvra S. Bhattacharyya
2008	C	`conf`	Functional DIF for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping William Plishker, Nimish Sane, Mary Kiemb, Kapil Anand, Shuvra S. Bhattacharyya
2008	—	`conf`	Heterogeneous Design in Functional DIF. SAMOS William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya
2008	—	`ed.`	International Conference on Embedded Software and Systems, ICESS '08, Chengdu, Sichuan, China, July 29-31, 2008. ICESS Shuvra S. Bhattacharyya, Xingshe Zhou, Bing Guo, Zili Shao, Xiangke Liao
2008	J	`jnl`	Introduction to the Special Issue on Embedded Computing Systems for DSP. J. Signal Process. Syst. Shuvra S. Bhattacharyya, Jarmo Takala, Georgi Gaydadjiev
2008	J	`jnl`	Memory-constrained Block Processing for DSP Software Optimization. J. Signal Process. Syst. Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya
2008	—	`conf`	Model-based mapping of a nonrigid image registration algorithm to heterogeneous architectures. CVPR Workshops Yashwanth Hemaraj, Mainak Sen, William Plishker, Raj Shekhar, Shuvra S. Bhattacharyya
2008	J	`jnl`	Model-based mapping of reconfigurable image registration on FPGA platforms. J. Real Time Image Process. Mainak Sen, Yashwanth Hemaraj, William Plishker, Raj Shekhar, Shuvra S. Bhattacharyya
2008	J	`jnl`	Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration. Int. J. Reconfigurable Comput. Omkar Dandekar, William Plishker, Shuvra S. Bhattacharyya, Raj Shekhar
2008	Misc	`conf`	Multiobjective Optimization of FPGA-Based Medical Image Registration. FCCM Omkar Dandekar, William Plishker, Shuvra S. Bhattacharyya, Raj Shekhar
2008	A*	`conf`	Multithreaded simulation for synchronous dataflow graphs. DAC Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya
2008	J	`jnl`	OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems. SIGARCH Comput. Archit. News Shuvra S. Bhattacharyya, Gordon J. Brebner, Jörn W. Janneck, Johan Eker, Carl von Platen, Marco Mattavelli, Mickaël Raulet
2008	Misc	`conf`	Parameterized design framework for hardware implementation of particle filters. ICASSP Sankalita Saha, Neal K. Bambha, Shuvra S. Bhattacharyya
2008	Misc	`conf`	Systematic generation of FPGA-based FFT implementations. ICASSP Hojin Kee, Newton Petersen, Jacob Kornerup, Shuvra S. Bhattacharyya
2008	J	`jnl`	The Signal Passing Interface and Its Application to Embedded Implementation of Smart Camera Applications. Proc. IEEE Sankalita Saha, Sebastian Puthenpurayil, Jason Schlessman, Shuvra S. Bhattacharyya, Wayne Wolf
2008	—	`conf`	Trade-offs in mapping high-level dataflow graphs onto ASIPs. SoC Vladimír Guzma, Shuvra S. Bhattacharyya, Pertti Kellomäki, Jarmo Takala
2007	A	`conf`	An Energy-Driven Design Methodology for Distributing DSP Applications across Wireless Sensor Networks. RTSS Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya, Neil Goldsman
2007	J	`jnl`	Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls. ACM Trans. Embed. Comput. Syst. Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
2007	C	`conf`	Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition. ISCAS Chung-Ching Shen, Roni Kupershtok, Bo Yang, Felice Maria Vanin, Xi Shao, Datta Sheth, Neil Goldsman, Quirino Balzano, Shuvra S. Bhattacharyya
2007	J	`jnl`	Dataflow-Based Mapping of Computer Vision Algorithms onto FPGAs. EURASIP J. Embed. Syst. Mainak Sen, Ivan Corretjer, Fiorella Haim, Sankalita Saha, Jason Schlessman, Tiehan Lv, Shuvra S. Bhattacharyya, Wayne H. Wolf
2007	B	`conf`	Design Techniques for Streamlined Integration and Fault Tolerance in a Distributed Sensor System for Line-crossing Recognition. ICCCN Chung-Ching Shen, Roni Kupershtok, Shuvra S. Bhattacharyya, Neil Goldsman
2007	—	`conf`	Efficient parallel memory organization for turbo decoders. EUSIPCO Perttu Salmela, Ruirui Gu, Shuvra S. Bhattacharyya, Jarmo Takala
2007	J	`jnl`	Efficient simulation of critical synchronous dataflow graphs. ACM Trans. Design Autom. Electr. Syst. Chia-Jui Hsu, Ming-Yung Ko, Shuvra S. Bhattacharyya, Suren Ramasubbu, José Luis Pino
2007	J	`jnl`	Embedded Digital Signal Processing Systems. EURASIP J. Embed. Syst. Jarmo Takala, Shuvra S. Bhattacharyya, Gang Qu
2007	—	`conf`	Energy-Aware Data Compression for Wireless Sensor Networks. ICASSP (2) Sebastian Puthenpurayil, Ruirui Gu, Shuvra S. Bhattacharyya
2007	—	`conf`	Low-Overhead Run-Time Scheduling for Fine-Grained Acceleration of Signal Processing Systems. SiPS Jani Boutellier, Shuvra S. Bhattacharyya, Olli Silvén
2007	J	`jnl`	Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Trans. Signal Process. Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Bart Kienhuis, Ed F. Deprettere
2007	J	`jnl`	Probabilistic design of multimedia embedded systems. ACM Trans. Embed. Comput. Syst. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
2007	—	`conf`	Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations. SiPS Perttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala
2006	—	`conf`	A Communication Interface for Multiprocessor Signal Processing Systems. ESTIMedia Sankalita Saha, Shuvra S. Bhattacharyya, Wayne H. Wolf
2006	—	`conf`	Affine Nested Loop Programs and their Binary Parameterized Dataflow Graph Counterparts. ASAP Ed F. Deprettere, Todor P. Stefanov, Shuvra S. Bhattacharyya, Mainak Sen
2006	J	`jnl`	Analysis of Dataflow Programs with Interval-limited Data-rates. J. VLSI Signal Process. Jürgen Teich, Shuvra S. Bhattacharyya
2006	—	`conf`	Configuration and Representation of Large-Scale Dataflow Graphs using the Dataflow Interchange Format. SiPS Ivan Corretjer, Chia-Jui Hsu, Shuvra S. Bhattacharyya
2006	J	`jnl`	Contention-conscious transaction ordering in multiprocessor DSP systems. IEEE Trans. Signal Process. Mukul Khandelia, Neal K. Bambha, Shuvra S. Bhattacharyya
2006	—	`conf`	Dataflow Transformations in High-level DSP System Design. SoC Sankalita Saha, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya
2006	J	`jnl`	Design Methods for DSP Systems. EURASIP J. Adv. Signal Process. Markus Rupp, Bernhard Wess, Shuvra S. Bhattacharyya
2006	J	`jnl`	Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors. IEEE Trans. Parallel Distributed Syst. Vida Kianzad, Shuvra S. Bhattacharyya
2006	A*	`conf`	Efficient simulation of critical synchronous dataflow graphs. DAC Chia-Jui Hsu, Suren Ramasubbu, Ming-Yung Ko, José Luis Pino, Shuvra S. Bhattacharyya
2006	—	`conf`	Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks. SAMOS Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman
2006	J	`jnl`	Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages. ACM Trans. Embed. Comput. Syst. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
2006	—	`conf`	Mapping Multimedia Applications Onto Configurable Hardware With Parameterized Cyclo-Static Dataflow Graphs. ICASSP (3) Fiorella Haim, Mainak Sen, Dong-Ik Ko, Shuvra S. Bhattacharyya, Wayne H. Wolf
2006	—	`conf`	Memory-constrained Block Processing Optimization for Synthesis of DSP Software. ICSAMOS Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya
2006	—	`conf`	Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System. ICPP Workshops Sankalita Saha, Chung-Ching Shen, Chia-Jui Hsu, Gaurav Aggarwal, Ashok Veeraraghavan, Alan Sussman, Shuvra S. Bhattacharyya
2006	—	`conf`	Register File Partitioning with Constraint Programming. SoC Perttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala
2006	Misc	`conf`	The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications. CODES+ISSS Dong-Ik Ko, Shuvra S. Bhattacharyya
2005	A	`conf`	An Extended Motion-Estimation Architecture Applied to Shape Recognition. ICME Jason Schlessman, Sankalita Saha, Wayne H. Wolf, Shuvra S. Bhattacharyya
2005	Misc	`conf`	An architectural level design methodology for embedded face detection. CODES+ISSS Vida Kianzad, Sankalita Saha, Jason Schlessman, Gaurav Aggarwal, Shuvra S. Bhattacharyya, Wayne H. Wolf, Rama Chellappa
2005	—	`conf`	CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems. ASAP Vida Kianzad, Shuvra S. Bhattacharyya, Gang Qu
2005	Misc	`conf`	Communication strategies for shared-bus embedded multiprocessors. EMSOFT Neal K. Bambha, Shuvra S. Bhattacharyya
2005	—	`conf`	Computer Vision on FPGAs: Design Methodology and its Application to Gesture Recognition. CVPR Workshops Mainak Sen, Ivan Corretjer, Fiorella Haim, Sankalita Saha, Shuvra S. Bhattacharyya, Jason Schlessman, Wayne H. Wolf
2005	C	`conf`	DSP Address Optimization Using Evolutionary Algorithms. SCOPES Sean Leventhal, Lin Yuan, Neal K. Bambha, Shuvra S. Bhattacharyya, Gang Qu
2005	—	`conf`	Dynamic configuration of dataflow graph topology for DSP system design [video encoder example]. ICASSP (5) Dong-Ik Ko, Shuvra S. Bhattacharyya
2005	J	`jnl`	Guest Editorial. J. VLSI Signal Process. Michael J. Schulte, Shuvra S. Bhattacharyya, Robert Schreiber
2005	J	`jnl`	Hardware/software codesign for DSP (from the Guest Editor). IEEE Signal Process. Mag. Shuvra S. Bhattacharyya, Jörg Henkel, Xiaobo Sharon Hu
2005	J	`jnl`	Joint Application Mapping/Interconnect Synthesis Techniques for Embedded Chip-Scale Multiprocessors. IEEE Trans. Parallel Distributed Syst. Neal K. Bambha, Shuvra S. Bhattacharyya
2005	—	`conf`	Modeling image processing systems with homogeneous parameterized dataflow graphs. ICASSP (5) Mainak Sen, Shuvra S. Bhattacharyya, Tiehan Lv, Wayne H. Wolf
2005	J	`jnl`	Modeling of Block-Based DSP Systems. J. VLSI Signal Process. Dong-Ik Ko, Shuvra S. Bhattacharyya
2005	C	`conf`	Porting DSP Applications across Design Tools Using the Dataflow Interchange Format. IEEE International Workshop on Rapid System Prototyping Chia-Jui Hsu, Shuvra S. Bhattacharyya
2005	C	`conf`	Software Synthesis from the Dataflow Interchange Format. SCOPES Chia-Jui Hsu, Shuvra S. Bhattacharyya
2004	—	`conf`	Analysis of Dataflow Programs with Interval-Limited Data-Rates. SAMOS Jürgen Teich, Shuvra S. Bhattacharyya
2004	J	`jnl`	Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications. ACM Trans. Design Autom. Electr. Syst. Praveen K. Murthy, Shuvra S. Bhattacharyya
2004	—	`conf`	CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems. ASAP Vida Kianzad, Shuvra S. Bhattacharyya
2004	C	`conf`	Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition. SCOPES Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
2004	—	`conf`	DIF: An Interchange Format for Dataflow-Based Design Tools. SAMOS Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya
2004	A	`conf`	Java-through-C Compilation: An Enabling Technology for Java in Embedded Systems. DATE Ankush Varma, Shuvra S. Bhattacharyya
2004	—	`conf`	Systematic Integration of Parameterized Local Search Techniques in Evolutionary Algorithms. GECCO (2) Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler
2004	—	`conf`	Systematic exploitation of data parallelism in hardware synthesis of DSP applications. ICASSP (5) Mainak Sen, Shuvra S. Bhattacharyya
2004	J	`jnl`	Systematic integration of parameterized local search into evolutionary algorithms. IEEE Trans. Evol. Comput. Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler
2004	J	`jnl`	The CBP Parameter: A Module Characterization Approach for DSP Software Optimization. J. VLSI Signal Process. Shuvra S. Bhattacharyya, Praveen K. Murthy
2004	J	`jnl`	The hierarchical timing pair model for multirate DSP applications. IEEE Trans. Signal Process. Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
2003	—	`conf`	Design Considerations for Optically Connected Systems on Chip. IWSOC Neal K. Bambha, Shuvra S. Bhattacharyya, Gary Euliss
2003	J	`jnl`	Editorial. EURASIP J. Adv. Signal Process. Magdy A. Bayoumi, Shuvra S. Bhattacharyya, Rudy Lauwereins
2003	A*	`conf`	Energy reduction techniques for multimedia applications with tolerance to deadline misses. DAC Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
2003	Misc	`conf`	Energy-Efficient Multi-processor Implementation of Embedded Software. EMSOFT Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
2003	C	`conf`	Exploring the Probabilistic Design Space of Multimedia Systems. IEEE International Workshop on Rapid System Prototyping Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
2003	J	`jnl`	Guest Editors' Introduction: Taking on the Embedded System Design Challenge. Computer Jörg Henkel, Xiaobo Hu, Shuvra S. Bhattacharyya
2003	J	`jnl`	Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. Bruce L. Jacob, Shuvra S. Bhattacharyya
2003	J	`jnl`	Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems. EURASIP J. Adv. Signal Process. Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
2003	—	`conf`	Logic foundry: rapid prototyping of FPGA-based DSP systems. ASP-DAC Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
2003	C	`conf`	Partitioning for DSP Software Synthesis. SCOPES Ming-Yung Ko, Shuvra S. Bhattacharyya
2002	—	`conf`	A Component Architecture for FPGA-Based, DSP System Design. ASAP Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
2002	—	`conf`	Consistency Analysis of Reconfigurable Dataflow Specifications. Embedded Processor Design Challenges Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
2002	J	`jnl`	High-Level Synthesis of DSP Applications Using Adaptive Negative Cycle Detection. EURASIP J. Adv. Signal Process. Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
2002	J	`jnl`	Intermediate Representations for Design Automation of Multiprocessor DSP Systems. Des. Autom. Embed. Syst. Neal K. Bambha, Vida Kianzad, Mukul Khandelia, Shuvra S. Bhattacharyya
2002	J	`jnl`	Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. Bruce L. Jacob, Shuvra S. Bhattacharyya
2002	Misc	`ed.`	Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002 CASES Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne H. Wolf, Ahmed Amine Jerraya
2001	—	`conf`	Adaptive negative cycle detection in dynamic graphs. ISCAS (5) Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
2001	Misc	`conf`	An efficient timing model for hardware implementation of multirate dataflow graphs. ICASSP Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
2001	—	`conf`	Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors. CODES Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler
2001	—	`conf`	Multiprocessor Clustering for Embedded Systems. Euro-Par Vida Kianzad, Shuvra S. Bhattacharyya
2001	J	`jnl`	Parameterized dataflow modeling for DSP systems. IEEE Trans. Signal Process. Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
2001	J	`jnl`	Shared buffer implementations of signal processing systems usinglifetime analysis techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Praveen K. Murthy, Shuvra S. Bhattacharyya
2001	—	`conf`	The hierarchical timing pair model. ISCAS (5) Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
2000	—	`conf`	A Joint Power/Performance Optimization Algorithm for Multiprocessor Systems using a Period Graph Construct. ISSS Neal K. Bambha, Shuvra S. Bhattacharyya
2000	—	`conf`	Contention-Conscious Transaction Ordering in Embedded Multiprocessors. ASAP Mukul Khandelia, Shuvra S. Bhattacharyya
2000	J	`jnl`	Evolutionary algorithms for the synthesis of embedded software. IEEE Trans. Very Large Scale Integr. Syst. Eckart Zitzler, Jürgen Teich, Shuvra S. Bhattacharyya
2000	J	`jnl`	Multidimensional Exploration of Software Implementations for DSP Algorithms. J. VLSI Signal Process. Eckart Zitzler, Jürgen Teich, Shuvra S. Bhattacharyya
2000	B	`conf`	Optimizing the efficiency of parameterized local search within global search: a preliminary study. CEC Eckart Zitzler, Jürgen Teich, Shuvra S. Bhattacharyya
2000	Misc	`conf`	Parameterized dataflow modeling of DSP systems. ICASSP Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
2000	C	`conf`	Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems. IEEE International Workshop on Rapid System Prototyping Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
2000	A	`conf`	Shared Memory Implementations of Synchronous Dataflow Specifications. DATE Praveen K. Murthy, Shuvra S. Bhattacharyya
2000	C	`conf`	The CBP parameter - a useful annotation to aid block-diagram compilers for DSP. ISCAS Shuvra S. Bhattacharyya, Praveen K. Murthy
1999	—	`conf`	3D exploration of software schedules for DSP algorithms. CODES Jürgen Teich, Eckart Zitzler, Shuvra S. Bhattacharyya
1999	—	`conf`	A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications. ISSS Praveen K. Murthy, Shuvra S. Bhattacharyya
1999	—	`conf`	Asynchrony and delay-insensitivity in computer engineering education. WCAE@HPCA Shuvra S. Bhattacharyya
1999	J	`jnl`	Synthesis of Embedded Software from Synchronous Dataflow Specifications. J. VLSI Signal Process. Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1998	A	`conf`	Buffer Memory Optimization in DSP Applications - An Evolutionary Approach. PPSN Jürgen Teich, Eckart Zitzler, Shuvra S. Bhattacharyya
1997	J	`jnl`	APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations. Des. Autom. Embed. Syst. Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1997	J	`jnl`	Joint Minimization of Code and Data for Synchronous Dataflow Programs. Formal Methods Syst. Des. Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee
1997	—	`conf`	Optimized software synthesis for synchronous dataflow. ASAP Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1997	J	`jnl`	Optimizing synchronization in multiprocessor DSP systems. IEEE Trans. Signal Process. Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee
1996	—	`conf`	Latency-constrained Resynchronization for Multiprocessor DSP Implementation. ASAP Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee
1996	—	`conf`	Self-Timed Resynchronization: A Post-Optimization for Static Multiprocessor Schedules. IPPS Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee
1995	C	`conf`	Converting graphical DSP programs into memory constrained software prototypes. RSP Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1995	—	`conf`	Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems. ASAP Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee
1994	J	`jnl`	Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms. Formal Methods Syst. Des. Shuvra S. Bhattacharyya, Edward A. Lee
1994	J	`jnl`	Memory management for dataflow programming of multirate signal processing algorithms. IEEE Trans. Signal Process. Shuvra S. Bhattacharyya, Edward A. Lee
1994	—	`conf`	Minimizing memory requirements for chain-structured synchronous dataflow programs. ICASSP (2) Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee
1993	J	`jnl`	Scheduling synchronous dataflow graphs for efficient looping. J. VLSI Signal Process. Shuvra S. Bhattacharyya, Edward A. Lee
1989	A*	`conf`	GABRIEL: A Design Environment for Programmable DSPs. DAC Edward A. Lee, E. Goei, H. Heine, W.-H. Ho, Shuvra S. Bhattacharyya, Jeffery C. Bier, E. Guntvedt
1989	J	`jnl`	Gabriel: a design environment for DSP. IEEE Trans. Acoust. Speech Signal Process. Edward A. Lee, W.-H. Ho, E. Goei, Jeffery C. Bier, Shuvra S. Bhattacharyya