Shunsuke Okura

27 papers C 2Journal 18Unranked 7

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A small-area and low-power readout circuit for a LOFIC CMOS image sensor. IEICE Electron. Express Seina Hori, Ai Otani, Yuki Rogi, Hiroaki Ogawa, Ken Miyauchi, Yuki Morikawa, Hideki Owada, Chia-Chi Kuo, Isao Takayanagi, Shunsuke Okura
2025	C	`conf`	An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor. ISCAS Ai Otani, Hiroaki Ogawa, Ken Miyauchi, Yuki Morikawa, Hideki Owada, Isao Takayanagi, Shunsuke Okura
2024	J	`jnl`	Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tatsuya Oyama, Kota Yoshida, Shunsuke Okura, Takeshi Fujino
2024	—	`conf`	Defense Method Against Adversarial Example Attacks using Thermal Noise of a CMOS Image Sensor. IEEE SENSORS Yuki Rogi, Kota Yoshida, Tatsuya Oyama, Takeshi Fujino, Shunsuke Okura
2024	—	`conf`	Lightweight Object Detection Model for a CMOS Image Sensor with Binary Feature Extraction. IEEE SENSORS Keiichiro Kuroda, Yudai Morikaku, Yu Osuka, Ryoya Iegaki, Kota Yoshida, Shunsuke Okura
2023	J	`jnl`	An Area-Efficient up/down Double-Sampling Circuit for a LOFIC CMOS Image Sensor. Sensors Ai Otani, Hiroaki Ogawa, Ken Miyauchi, Sangman Han, Hideki Owada, Isao Takayanagi, Shunsuke Okura
2023	J	`jnl`	Backdoor Attack on Deep Neural Networks Triggered by Fault Injection Attack on Image Sensor Interface. Sensors Tatsuya Oyama, Shunsuke Okura, Kota Yoshida, Takeshi Fujino
2022	J	`jnl`	Experimental Study of Fault Injection Attack on Image Sensor Interface for Triggering Backdoored DNN Models. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tatsuya Oyama, Shunsuke Okura, Kota Yoshida, Takeshi Fujino
2022	—	`conf`	Fundamental Study of Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface. AsianHOST Tatsuya Oyama, Kota Yoshida, Shunsuke Okura, Takeshi Fujino
2021	J	`jnl`	Area-Efficient Post-Processing Circuits for Physically Unclonable Function with 2-Mpixel CMOS Image Sensor. Sensors Shunsuke Okura, Masanori Aoki, Tatsuya Oyama, Masayoshi Shirahata, Takeshi Fujino, Kenichiro Ishikawa, Isao Takayanagi
2021	—	`conf`	Backdoor Attack on Deep Neural Networks Triggered by Fault Injection Attack on Image Sensor Interface. ASHES@CCS Tatsuya Oyama, Shunsuke Okura, Kota Yoshida, Takeshi Fujino
2021	J	`jnl`	Model Reverse-Engineering Attack against Systolic-Array-Based DNN Accelerator Using Correlation Power Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kota Yoshida, Mitsuru Shiozaki, Shunsuke Okura, Takaya Kubota, Takeshi Fujino
2021	J	`jnl`	Modeling attacks against device authentication using CMOS image sensor PUF. IEICE Electron. Express Hiroshi Yamada, Shunsuke Okura, Masayoshi Shirahata, Takeshi Fujino
2020	C	`conf`	Model Reverse-Engineering Attack using Correlation Power Analysis against Systolic Array Based Neural Network Accelerator. ISCAS Kota Yoshida, Takaya Kubota, Shunsuke Okura, Mitsuru Shiozaki, Takeshi Fujino
2019	J	`jnl`	A 120-ke- Full-Well Capacity 160-µV/e- Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor. Sensors Isao Takayanagi, Ken Miyauchi, Shunsuke Okura, Kazuya Mori, Junichi Nakamura, Shigetoshi Sugawa
2018	—	`conf`	A Dynamic Soft-Decision Fuzzy Extractor for a CMOS Image Sensor PUF. ISPACS Shunsuke Okura, Ryota Ishiki, Masayoshi Shirahata, Takaya Kubota, Mitsuru Shiozaki, Kenichiro Ishikawa, Isao Takayanagi, Takeshi Fujino
2018	J	`jnl`	An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process. Sensors Isao Takayanagi, Norio Yoshimura, Kazuya Mori, Shinichiro Matsuo, Shunsuke Tanaka, Hirofumi Abe, Naoto Yasuda, Kenichiro Ishikawa, Shunsuke Okura, Shinji Ohsawa, Toshinori Otaka
2015	J	`jnl`	A 3.7 M-Pixel 1300-fps CMOS Image Sensor With 5.0 G-Pixel/s High-Speed Readout Circuit. IEEE J. Solid State Circuits Shunsuke Okura, Osamu Nishikido, Yusuke Sadanaga, Yasuhiro Kosaka, Norihiko Araki, Kazuhiro Ueda, Fukashi Morishita
2014	—	`conf`	A 3.7M-pixel 1300-fps CMOS image sensor with 5.0G-pixel/s high-speed readout circuit. VLSIC Shunsuke Okura, Osamu Nishikido, Yusuke Sadanaga, Yasuhiro Kosaka, Norihiko Araki, Kazuhiro Ueda, Masanori Tachibana, Fukashi Morishita
2013	J	`jnl`	A low-power technique for pipelined ADCs with programmable gain amplification. IEICE Electron. Express Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka, Kenji Taniguchi
2013	J	`jnl`	Low-Power On-Chip Charge-Recycling DC-DC Conversion Circuit and System. IEEE J. Solid State Circuits Kazuhiro Ueda, Fukashi Morishita, Shunsuke Okura, Leona Okamura, Tsutomu Yoshihara, Kazutami Arimoto
2011	J	`jnl`	An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference. IEICE Trans. Electron. Indika U. K. Bogoda Appuhamylage, Shunsuke Okura, Toru Ido, Kenji Taniguchi
2010	J	`jnl`	A Frequency Model of a Continuously Driven Clocked CMOS Comparator. IEEE Trans. Circuits Syst. II Express Briefs Shunsuke Okura, Hajime Shibata, Tetsuro Okura, Toru Ido, Kenji Taniguchi
2010	J	`jnl`	An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique. IEEE Trans. Circuits Syst. II Express Briefs Indika U. K. Bogoda Appuhamylage, Shunsuke Okura, Toru Ido, Kenji Taniguchi
2009	J	`jnl`	A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shunsuke Okura, Tetsuro Okura, Toru Ido, Kenji Taniguchi
2007	J	`jnl`	A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shunsuke Okura, Tetsuro Okura, Indika U. K. Bogoda Appuhamylage, Kenji Taniguchi
2006	—	`conf`	Frequency Response Analysis of Latch Utilized in High-Speed Comparator. ICECS Shunsuke Okura, Tetsuro Okura, Kenji Taniguchi, Hajime Shibata