Shunsuke Fukami

17 papers C 2Journal 9Unranked 6

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Probabilistic computing utilizing stochastic spintronic devices. ISMVL Shunsuke Fukami
2023	J	`jnl`	A full-stack view of probabilistic computing with p-bits: devices, architectures and algorithms. CoRR Shuvro Chowdhury, Andrea Grimaldi, Navid Anjum Aadit, Shaila Niazi, Masoud Mohseni, Shun Kanai, Hideo Ohno, Shunsuke Fukami, Luke Theogarajan, Giovanni Finocchio, Supriyo Datta, Kerem Yunus Çamsari
2023	J	`jnl`	CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and learning. CoRR Keito Kobayashi, Nihal Singh, Qixuan Cao, Kemal Selcuk, Tianrui Hu, Shaila Niazi, Navid Anjum Aadit, Shun Kanai, Hideo Ohno, Shunsuke Fukami, Kerem Yunus Çamsari
2023	J	`jnl`	Double-Free-Layer Stochastic Magnetic Tunnel Junctions with Synthetic Antiferromagnets. CoRR Kemal Selcuk, Shun Kanai, Rikuto Ota, Hideo Ohno, Shunsuke Fukami, Kerem Yunus Çamsari
2021	J	`jnl`	Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition. IEEE J. Solid State Circuits Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Hui Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
2021	J	`jnl`	Hardware-aware in-situ Boltzmann machine learning using stochastic magnetic tunnel junctions. CoRR Jan Kaiser, William A. Borders, Kerem Yunus Çamsari, Shunsuke Fukami, Hideo Ohno, Supriyo Datta
2021	J	`jnl`	Spintronic memristors for computing. CoRR Qiming Shao, Zhongrui Wang, Yan Zhou, Shunsuke Fukami, Damien Querlioz, J. Joshua Yang, Yiran Chen, Leon O. Chua
2020	J	`jnl`	Double Free-Layer Magnetic Tunnel Junctions for Probabilistic Bits. CoRR Kerem Yunus Çamsari, Mustafa Mert Torunbalci, William A. Borders, Hideo Ohno, Shunsuke Fukami
2020	—	`conf`	Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage. VLSI Circuits Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Hui Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
2019	J	`jnl`	Integer factorization using stochastic magnetic tunnel junctions. Nat. William A. Borders, Ahmed Zeeshan Pervaiz, Shunsuke Fukami, Kerem Yunus Çamsari, Hideo Ohno, Supriyo Datta
2015	—	`conf`	Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. VLSIC Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2014	—	`conf`	10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications. ISSCC Noboru Sakimura, Yukihide Tsuji, Ryusuke Nebashi, Hiroaki Honjo, Ayuka Morioka, Kunihiko Ishihara, Keizo Kinoshita, Shunsuke Fukami, Sadahiko Miura, Naoki Kasai, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu, Tadahiko Sugibayashi
2014	C	`conf`	A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing. ISCAS Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Ayuka Morioka, Yukihide Tsuji, Kunihiko Ishihara, Keiichi Tokutome, Sadahiko Miura, Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi
2014	—	`conf`	Advances in spintronics devices for microelectronics - From spin-transfer torque to spin-orbit torque. ASP-DAC Shunsuke Fukami, Hideo Sato, Michihiko Yamanouchi, Shoji Ikeda, Fumihiro Matsukura, Hideo Ohno
2012	C	`conf`	High-speed simulator including accurate MTJ models for spintronics integrated circuit design. ISCAS Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Hiroaki Honjo, Tadahiko Sugibayashi, Hiroki Koike, Takashi Ohsawa, Shunsuke Fukami, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh
2009	—	`conf`	A 90nm 12ns 32Mb 2T1MTJ MRAM. ISSCC Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Shinsaku Saito, Yuichi Ito, Sadahiko Miura, Yuko Kato, Kaoru Mori, Yasuaki Ozaki, Yosuke Kobayashi, Norikazu Ohshima, Keizo Kinoshita, Tetsuhiro Suzuki, Kiyokazu Nagahara, Nobuyuki Ishiwata, Katsumi Suemitsu, Shunsuke Fukami, Hiromitsu Hada, Tadahiko Sugibayashi, Naoki Kasai
2007	J	`jnl`	A 16-Mb Toggle MRAM With Burst Modes. IEEE J. Solid State Circuits Tadahiko Sugibayashi, Noboru Sakimura, Takeshi Honda, Kiyokazu Nagahara, Kiyotaka Tsuji, Hideaki Numata, Sadahiko Miura, Ken-ichi Shimura, Yuko Kato, Shinsaku Saito, Yoshiyuki Fukumoto, Hiroaki Honjo, Tetsuhiro Suzuki, Katsumi Suemitsu, Tomonori Mukai, Kaoru Mori, Ryusuke Nebashi, Shunsuke Fukami, Norikazu Ohshima, Hiromitsu Hada, Nobuyuki Ishiwata, Naoki Kasai, Shuichi Tahara