Shunpei Yamazaki

24 papers Journal 8Unranked 16
YearRankTypeTitle / Venue / Authors
2024 — conf
Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM.
IMW
Hiraki Inoue, Takeya Hirose, Toshiki Mizuguchi, Yusuke Komura, Toshihiko Saito, Minato Ito, Kiyotaka Kimura, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, Hajime Kimura, Makoto Ikeda, Shunpei Yamazaki
2023 — conf
1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.
VLSI Technology and Circuits
Yuki Okamoto, Yusuke Komura, Toshiki Mizuguchi, Toshihiko Saito, Minato Ito, K. Kimura, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, Hajime Kimura, M. Fujita, Makoto Ikeda, Shunpei Yamazaki
2023 — conf
Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating.
ISSCC
Yuto Yakubo, Kazuma Furutani, Kouhei Toyotaka, Haruki Katagiri, Masashi Fujita, Munehiro Kozuma, Yoshinori Ando, Yoshiyuki Kurokawa, Toru Nakura, Shunpei Yamazaki
2023 — conf
Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor Memory.
IRPS
H. Takahashi, Y. Okamoto, Toshiki Hamada, Yusuke Komura, S. Watanabe, Kazuki Tsuda, H. Sawai, Takanori Matsuzaki, Yoshinori Ando, Tatsuya Onuki, Hitoshi Kunitake, Shunpei Yamazaki, D. Kobayashi, A. Ikuta, Takahiro Makino, Takeshi Ohshima
2023 — conf
Two-Dimensionally Arranged Display Drivers Achieved by OS/Si Structure.
VLSI Technology and Circuits
Yusuke Komura, Shoki Miyata, Yuki Okamoto, Yuki Tamatsukuri, Hiroki Inoue, Toshihiko Saito, Munehiro Kozuma, Hidetomo Kobayashi, Tatsuya Onuki, Yuichi Yanagisawa, Toshihiko Takeuchi, Yutaka Okazaki, Hitoshi Kunitake, Daiki Nakamura, Takaaki Nagata, Yasumasa Yamane, Makoto Ikeda, Shih-Ci Yen, Chuan-Hua Chang, Wen-Hsiang Hsieh, Hiroshi Yoshida, Min-Cheng Chen, Ming-Han Liao, Shou-Zen Chang, Shunpei Yamazaki
2019 — conf
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.
VLSI Circuits
Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki
2019 — conf
Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection IC.
ISSCC
Hiroki Inoue, Takeshi Aoki, Fumika Akasawa, Toshiki Hamada, Toshihiko Takeuchi, Kousei Nei, Takako Seki, Yuto Yakubo, Kei Takahashi, Shuji Fukai, Takahiko Ishizu, Munehiro Kozuma, Ryota Tajima, Takanori Matsuzaki, Takayuki Ikeda, Makoto Ikeda, Shunpei Yamazaki
2018 — conf
A 20ns-write 45ns-read and 10
ISSCC
Shuhei Maeda, Satoru Ohshita, Kazuma Furutani, Yuto Yakubo, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda, Masahiro Fujita, Shunpei Yamazaki
2017 J jnl
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.
IEEE J. Solid State Circuits
Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki
2017 J jnl
Subthreshold Operation of CAAC-IGZO FPGA by Overdriving of Programmable Routing Switch and Programmable Power Switch.
IEEE Trans. Very Large Scale Integr. Syst.
Munehiro Kozuma, Yuki Okamoto, Takashi Nakagawa, Takeshi Aoki, Yoshiyuki Kurokawa, Takayuki Ikeda, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Makoto Ikeda, Masahiro Fujita, Shunpei Yamazaki
2016 J jnl
A 25 3 μW at 60 fps 240 × 160 Pixel Vision Sensor for Motion Capturing With In-Pixel Nonvolatile Analog Memory Using CAAC-IGZO FET.
IEEE J. Solid State Circuits
Takuro Ohmaru, Takashi Nakagawa, Shuhei Maeda, Yuki Okamoto, Munehiro Kozuma, Seiichi Yoneda, Hiroki Inoue, Yoshiyuki Kurokawa, Takayuki Ikeda, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Makoto Ikeda, Shunpei Yamazaki
2016 — conf
Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.
VLSI Circuits
Tatsuya Onuki, Wataru Uesugi, Hikaru Tamura, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, Chen Bin Lin, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki
2015 — conf
16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.
ISSCC
Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki
2015 — conf
6.5 25.3μW at 60fps 240×160-pixel vision sensor for motion capturing with in-pixel non-volatile analog memory using crystalline oxide semiconductor FET.
ISSCC
Takuro Ohmaru, Takashi Nakagawa, Shuhei Maeda, Yuki Okamoto, Munehiro Kozuma, Seiichi Yoneda, Hiroki Inoue, Yoshiyuki Kurokawa, Takayuki Ikeda, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Makoto Ikeda, Shunpei Yamazaki
2015 J jnl
A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology.
IEEE Trans. Very Large Scale Integr. Syst.
Yuki Okamoto, Takashi Nakagawa, Takeshi Aoki, Masataka Ikeda, Munehiro Kozuma, Takeshi Osada, Yoshiyuki Kurokawa, Takayuki Ikeda, Naoto Yamade, Yutaka Okazaki, Hidekazu Miyairi, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki
2015 J jnl
Normally-Off Computing for Crystalline Oxide Semiconductor-Based Multicontext FPGA Capable of Fine-Grained Power Gating on Programmable Logic Element With Nonvolatile Shadow Register.
IEEE J. Solid State Circuits
Takeshi Aoki, Yuki Okamoto, Takashi Nakagawa, Munehiro Kozuma, Yoshiyuki Kurokawa, Takayuki Ikeda, Naoto Yamade, Yutaka Okazaki, Hidekazu Miyairi, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki
2014 — conf
30.9 Normally-off computing with crystalline InGaZnO-based FPGA.
ISSCC
Takeshi Aoki, Yuki Okamoto, Takashi Nakagawa, Masataka Ikeda, Munehiro Kozuma, Takeshi Osada, Yoshiyuki Kurokawa, Takayuki Ikeda, Naoto Yamade, Yutaka Okazaki, Hidekazu Miyairi, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki
2014 — conf
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.
VLSIC
Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki
2014 J jnl
Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor.
IEEE Micro
Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Wataru Uesugi, Atsuo Isobe, Naoaki Tsutsui, Yasutaka Suzuki, Yutaka Okazaki, Yukio Maehashi, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki, Masahiro Fujita, James Myers, Pekka Korpinen
2014 — conf
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.
COOL Chips
Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki
2013 — conf
Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor.
COOL Chips
Hidetomo Kobayashi, Kiyoshi Kato, Takuro Ohmaru, Seiichi Yoneda, Tatsuji Nishijima, Shuhei Maeda, Kazuaki Ohshima, Hikaru Tamura, Hiroyuki Tomatsu, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Jun Koyama, Shunpei Yamazaki
2012 J jnl
Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.
IEEE J. Solid State Circuits
Hiroki Inoue, Takanori Matsuzaki, Shuhei Nagatsuka, Yutaka Okazaki, Toshinari Sasaki, Kousei Noda, Daisuke Matsubayashi, Takahiko Ishizu, Tatsuya Onuki, Atsuo Isobe, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Jun Koyama, Shunpei Yamazaki
2008 J jnl
UHF RFCPUs on Flexible and Glass Substrates for Secure RFID Systems.
IEEE J. Solid State Circuits
Yoshiyuki Kurokawa, Takayuki Ikeda, Masami Endo, Hiroki Dembo, Daisuke Kawae, Takayuki Inoue, Munehiro Kozuma, Daisuke Ohgarane, Satoru Saito, Koji Dairiki, Hidekazu Takahashi, Yutaka Shionoiri, Tomoaki Atsumi, Takeshi Osada, Kei Takahashi, Takanori Matsuzaki, Hiroyuki Takashina, Yoshinari Yamashita, Shunpei Yamazaki
2007 — conf
UHF RFCPUs on Flexible and Glass Substrates for Secure RFID Systems.
ISSCC
Yoshiyuki Kurokawa, Takayuki Ikeda, Masami Endo, Hiroki Dembo, Daisuke Kawae, Takayuki Inoue, Munehiro Kozuma, Daisuke Ohgarane, Satoru Saito, Koji Dairiki, Hidekazu Takahashi, Yutaka Shionoiri, Tomoaki Atsumi, Takeshi Osada, Kei Takahashi, Takanori Matsuzaki, Hiroyuki Takashina, Yoshinari Yamashita, Shunpei Yamazaki