Shunji Nakata

21 papers C 2Journal 17Unranked 2
YearRankTypeTitle / Venue / Authors
2017 J jnl
An Adiabatic Circuit with Consecutive Changes of the Duty Ratio of the Switching Transistor Using a Microprocessor.
J. Circuits Syst. Comput.
Shunji Nakata, Masaki Ono, Masato Sakitani
2014 — conf
A new stepwise adiabatic charging circuit with a smaller capacitance in a regenerator than a load capacitance.
MWSCAS
Shunji Nakata, Hiroshi Makino, Yoshio Matsuda
2014 J jnl
Analysis of voltage, Current and Energy dissipation of Stepwise Adiabatic Charging of a capacitor using a nonresonant inductor Current.
J. Circuits Syst. Comput.
Shunji Nakata, Hiroshi Makino, Ryota Honda, Masayuki Miyama, Yoshio Matsuda
2014 J jnl
Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shunji Nakata, Hiroshi Makino, Junpei Hosokawa, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda
2014 J jnl
Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage.
IEEE Trans. Very Large Scale Integr. Syst.
Shunji Nakata, Hiroki Hanazono, Hiroshi Makino, Hiroki Morimura, Masayuki Miyama, Yoshio Matsuda
2012 — conf
Energy dissipation reduction during adiabatic charging and discharging with controlled inductor current.
MWSCAS
Shunji Nakata, Ryota Honda, Hiroshi Makino, Hiroki Morimura, Yoshio Matsuda
2012 J jnl
General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shunji Nakata, Ryota Honda, Hiroshi Makino, Shin'ichiro Mutoh, Masayuki Miyama, Yoshio Matsuda
2012 J jnl
Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield.
IET Circuits Devices Syst.
Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda
2011 J jnl
Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution.
IEEE Trans. Circuits Syst. II Express Briefs
Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda
2010 C conf
Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit.
ISCAS
Shunji Nakata, Hirotsugu Suzuki, Ryota Honda, Takahito Kusumoto, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda
2010 J jnl
Adiabatic charging and discharging method with minimum energy dissipation for a variable-gap capacitor system.
IET Circuits Devices Syst.
Shunji Nakata, Masayuki Miyama, Yoshio Matsuda
2010 J jnl
Stable adiabatic circuit using advanced series capacitors and time variation of energy dissipation.
IEICE Electron. Express
Shunji Nakata, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda
2009 C conf
Adiabatic SRAM with a Large Margin of VT Variation by Controlling the Cell-power-line and Word-line Voltage.
ISCAS
Shunji Nakata, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda
2008 J jnl
Adiabatic quasi 6T-SRAM with shared writing and reading ports.
IEICE Electron. Express
Shunji Nakata
2007 J jnl
Electrostatic Energy, Potential Energy and Energy Dissipation for a Width-Variable Capacitor Coupled with Mechatronical Potential Energy during Adiabatic Charging.
IEICE Trans. Electron.
Shunji Nakata, Yoshitada Katagiri
2007 J jnl
Stability of adiabatic circuit using asymmetric 1D-capacitor array between the power supply and ground.
IEICE Electron. Express
Shunji Nakata
2007 J jnl
Stability of adiabatic reversible charging using 1D-capacitor array between the power supply and ground.
IEICE Electron. Express
Shunji Nakata
2007 J jnl
Stability of an adiabatic circuit with inductive load using 1D-capacitor array between the power supply and ground.
IEICE Electron. Express
Shunji Nakata
2006 J jnl
Adiabatic SRAM with the large margin of V
IEICE Electron. Express
Shunji Nakata
2006 J jnl
Analysis of the stability of adiabatic reversible logic using the theory of normal modes in coupled oscillators.
IEICE Electron. Express
Shunji Nakata
2005 J jnl
The stability of adiabatic reversible logic using asymmetric tank capacitors and its application to SRAM.
IEICE Electron. Express
Shunji Nakata