Shuang Liang

12 papers A* 2Misc 1Journal 5Unranked 4
YearRankTypeTitle / Venue / Authors
2026 A* conf
Advancing Full-Stack Acceleration for SchröDinger-Style Quantum Simulation.
HPCA
Shuang Liang, Yuncheng Lu, Ce Guo, Paul H. J. Kelly, Wayne Luk, Hongxiang Fan
2026 — conf
FastTTS: Accelerating Test-Time Scaling for Edge LLM Reasoning.
ASPLOS (2)
Hao Mark Chen, Zhiwen Mo, Guanxi Lu, Shuang Liang, Lingxiao Ma, Wayne Luk, Hongxiang Fan
2026 — conf
Hardware-Efficient Union-Find Decoder Towards Scalable Topological Quantum Codes.
ASP-DAC
Shuang Liang, Jubo Xu, Yuncheng Lu, Hao Mark Chen, Bo Yuan, Hongxiang Fan
2025 J jnl
Democratizing Agentic AI with Fast Test-Time Scaling on the Edge.
CoRR
Hao Mark Chen, Zhiwen Mo, Guanxi Lu, Shuang Liang, Lingxiao Ma, Wayne Luk, Hongxiang Fan
2025 A* conf
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation.
DAC
Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly
2025 J jnl
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation.
CoRR
Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly
2024 Misc conf
PCQ: Parallel Compact Quantum Circuit Simulation.
FCCM
Shuang Liang, Yuncheng Lu, Ce Guo, Wayne Luk, Paul H. J. Kelly
2018 J jnl
FP-BNN: Binarized neural network on FPGA.
Neurocomputing
Shuang Liang, Shouyi Yin, Leibo Liu, Wayne Luk, Shaojun Wei
2016 J jnl
A Coarse-Grained Reconfigurable Architecture for Compute-Intensive MapReduce Acceleration.
IEEE Comput. Archit. Lett.
Shuang Liang, Shouyi Yin, Leibo Liu, Yike Guo, Shaojun Wei
2016 — conf
Relation-oriented resource allocation for multi-accelerator systems.
ASAP
Teng Yu, Bo Feng, Mark Stillwell, José Gabriel F. Coutinho, Wenlai Zhao, Shuang Liang, Wayne Luk, Alexander L. Wolf, Yuchun Ma
2015 J jnl
The Implementation of Texture-Based Video Up-Scaling on Coarse-Grained Reconfigurable Architecture.
IEICE Trans. Inf. Syst.
Rui Shi, Shouyi Yin, Leibo Liu, Qiongbing Liu, Shuang Liang, Shaojun Wei
2011 — conf
Performance evaluation modeling for reconfigurable processor.
ASICON
Shuang Liang, Shouyi Yin, Chongyong Yin, Leibo Liu, Shaojun Wei