Shreya Kundu - RankMe

14 papers Journal 1Unranked 13

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Accurate off-current evaluation by parasitic capacitance extraction in capacitor-less DRAM cells. IMW Daisuke Matsubayashi, Subhali Subhechha, Hyungrock Oh, Nouredine Rassoul, Shamin Houshmand Sharifi, Yiqun Wan, Shreya Kundu, Harinarayanan Puliyalil, Harold Dekkers, Alexandru Pavel, Inhee Lee, Gouri Sankar Kar, Attilio Belmonte
2024	—	`conf`	Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory. IRPS Taras Ravsher, Robin Degraeve, Daniele Garbin, Sergiu Clima, Andrea Fantini, Gabriele Luca Donadio, Shreya Kundu, Wouter Devulder, Hubert Hody, Goedele Potoms, Jan Van Houdt, Valeri Afanas'ev, Attilio Belmonte, Gouri Sankar Kar
2024	—	`conf`	Mitigating Line-Break Defectivity with a Sandwiched TiN or W Layer for Metal Pitch 18 NM Aspect Ratio 6 Semi-Damascene Interconnects. VLSI Technology and Circuits Anshul Gupta, Shreya Kundu, Stefan Decoster, K. Sah, G. Delie, B. Truijen, Davide Tierno, Giulio Marti, O. Varela Pedreira, B. Kenens, Y. Hermans, C. Adelmann, B. de Wachter, Ivan Ciofi, G. Murdoch, A. Cross, Seongho Park, Zsolt Tokei
2023	—	`conf`	Integration of epitaxial monolayer MX₂ channels on 300mm wafers via Collective-Die-To-Wafer (CoD2W) transfer. VLSI Technology and Circuits Souvik Ghosh, Quentin Smets, S. Banerjee, Tom Schram, Koen Kennes, R. Verheyen, P. Kumar, M.-E. Boulon, Benjamin Groven, H. M. Silva, Shreya Kundu, Daire Cott, Dennis Lin, P. Favia, T. Nuytten, A. Phommahaxay, Inge Asselberghs, C. De La Rosa, Gouri Sankar Kar, Steven Brems
2023	—	`conf`	Lowest IOFF < 3×10 VLSI Technology and Circuits Attilio Belmonte, Shreya Kundu, S. Subhechha, Adrian Vaisman Chasin, Nouredine Rassoul, Harold Dekkers, H. Puliyalil, F. Seidel, P. Carolan, Romain Delhougne, Gouri Sankar Kar
2023	—	`conf`	Towards low damage and fab-compatible top-contacts in MX2 transistors using a combined synchronous pulse atomic layer etch and wet-chemical etch approach. VLSI Technology and Circuits Shreya Kundu, D. H. van Doip, Tom Schram, Quentin Smets, S. Banerjee, Benjamin Groven, Daire Cott, Stefan Decoster, P. Bezard, F. Lazzarino, K. Banerjee, Souvik Ghosh, J. F. de Mamelfe, Pierre Morin, Cesar J. Lockhart de la Rosa, Inge Asselberghs, Gouri Sankar Kar
2022	—	`conf`	Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control. ICICDT S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, K. Banerjee, H. Puliyalil, Shreya Kundu, M. Pak, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar
2022	—	`conf`	Enhanced performance and low-power capability of SiGeAsSe-GeSbTe 1S1R phase-change memory operated in bipolar mode. VLSI Technology and Circuits Taras Ravsher, Daniele Garbin, Andrea Fantini, Robin Degraeve, Sergiu Clima, Gabriele Luca Donadio, Shreya Kundu, Hubert Hody, Wouter Devulder, Jan Van Houdt, Valeri Afanas'ev, Romain Delhougne, Gouri Sankar Kar
2022	—	`conf`	First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP. VLSI Technology and Circuits Gayle Murdoch, Matin O'Toole, Giulio Marti, Ankit Pokhrel, Diana Tsvetanova, Stefan Decoster, Shreya Kundu, Yusuke Oniki, Arame Thiam, Quoc Toan Le, Olalla Varela Pedreira, Alicja Lesniewska, Gerardo Martinez-Alanis, Seongho Park, Zsolt Tokei
2022	—	`conf`	Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm. VLSI Technology and Circuits S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, S. Sutar, L. Magnarin, Umberto Celano, H. Puliyalil, Shreya Kundu, M. Pak, Lieve Teugels, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, C. Biasotto, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar
2021	—	`conf`	Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution. IRPS Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar
2021	—	`conf`	STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application. IMW Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar
2018	—	`conf`	SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories. VLSI Circuits Kevin Garello, Kevin Garello Yasin, Sebastien Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar
2018	J	`jnl`	SOT-MRAM 300mm integration for low power and ultrafast embedded memories. CoRR Kevin Garello, Farrukh Yasin, Sebastien Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar