Shounak Chakraborty

29 papers A* 2A 2C 1Misc 4Journal 13Unranked 7
YearRankTypeTitle / Venue / Authors
2025 J jnl
HotReRAM: A Performance-Power-Thermal Simulation Framework for ReRAM-Based Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shounak Chakraborty, Thanasin Bunnam, Jedsada Arunruerk, Sukarn Agarwal, Shengqi Yu, Rishad A. Shafik, Magnus Själander
2025 J jnl
PRECIOUS: Approximate Real-Time Computing in MLC-MRAM Based Heterogeneous CMPs.
IEEE Trans. Computers
Sangeet Saha, Shounak Chakraborty, Sukarn Agarwal, Magnus Själander, Klaus D. Maier
2024 J jnl
ARCTIC: Approximate Real-Time Computing in a Cache-Conscious Multicore Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sangeet Saha, Shounak Chakraborty, Sukarn Agarwal, Magnus Själander, Klaus D. McDonald-Maier
2024 A* conf
MAFin: Maximizing Accuracy in FinFET based Approximated Real-Time Computing.
DAC
Shounak Chakraborty, Sangeet Saha, Magnus Själander, Klaus D. McDonald-Maier
2024 A conf
TEEMO: Temperature Aware Energy Efficient Multi-Retention STT-RAM Cache Architecture.
IPDPS
Sukarn Agarwal, Shounak Chakraborty, Magnus Själander
2024 J jnl
TREAFET: Temperature-Aware Real-Time Task Scheduling for FinFET based Multicores.
ACM Trans. Embed. Comput. Syst.
Shounak Chakraborty, Yanshul Sharma, Sanjay Moulik
2023 A* conf
Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR).
DAC
Sukarn Agarwal, Shounak Chakraborty, Magnus Själander
2023 J jnl
DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore.
IEEE Trans. Parallel Distributed Syst.
Sangeet Saha, Shounak Chakraborty, Sukarn Agarwal, Rahul Gangopadhyay, Magnus Själander, Klaus D. McDonald-Maier
2023 — conf
NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core Systems.
SAMOS
Shounak Chakraborty, Mehdi Safarpour, Olli Silvén
2022 J jnl
ACCURATE: Accuracy Maximization for Real-Time Multicore Systems With Energy-Efficient Way-Sharing Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sangeet Saha, Shounak Chakraborty, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
2022 J jnl
ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms.
J. Supercomput.
Yanshul Sharma, Shounak Chakraborty, Sanjay Moulik
2022 A conf
RESTORE: Real-Time Task Scheduling on a Temperature Aware FinFET based Multicore.
DATE
Yanshul Sharma, Sanjay Moulik, Shounak Chakraborty
2022 — conf
STIFF: thermally safe temperature effect inversion aware FinFET based multi-core.
CF
Shounak Chakraborty, Vassos Soteriou, Magnus Själander
2021 — conf
ABACa: Access Based Allocation on Set Wise Multi-Retention in STT-RAM Last Level Cache.
ASAP
Sukarn Agarwal, Shounak Chakraborty
2021 J jnl
Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization.
ACM Trans. Embed. Comput. Syst.
Shounak Chakraborty, Sangeet Saha, Magnus Själander, Klaus D. McDonald-Maier
2021 J jnl
SEAMERS: A Semi-partitioned Energy-Aware scheduler for heterogeneous MulticorEReal-time Systems.
J. Syst. Archit.
Sanjay Moulik, Zinea Das, Rajesh Devaraj, Shounak Chakraborty
2021 J jnl
WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained DVFS for Reduced On-Chip Temperature and Leakage Consumption.
ACM Trans. Archit. Code Optim.
Shounak Chakraborty, Magnus Själander
2020 Misc conf
RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress.
CODES+ISSS
Shounak Chakraborty, Sangeet Saha, Magnus Själander, Klaus D. McDonald-Maier
2019 J jnl
Exploring the Role of Large Centralised Caches in Thermal Efficient Chip Design.
ACM Trans. Design Autom. Electr. Syst.
Shounak Chakraborty, Hemangee K. Kapoor
2018 J jnl
Analysing the Role of Last Level Caches in Controlling Chip Temperature.
IEEE Trans. Sustain. Comput.
Shounak Chakraborty, Hemangee K. Kapoor
2018 — conf
Utility Aware Snoozy Caches for Energy Efficient Chip Multi-Processors.
ACM Great Lakes Symposium on VLSI
Ashwini A. Kulkarni, Shounak Chakraborty, Shrinivas P. Mahajan, Hemangee K. Kapoor
2017 J jnl
Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs.
Microprocess. Microsystems
Shounak Chakraborty, Hemangee K. Kapoor
2017 Misc conf
Towards Controlling Chip Temperature by Dynamic Cache Reconfiguration in Multiprocessors.
VLSID
Shounak Chakraborty, Hemangee K. Kapoor
2016 Misc conf
Static energy efficient cache reconfiguration for dynamic NUCA in tiled CMPs.
SAC
Shounak Chakraborty, Shirshendu Das, Hemangee K. Kapoor
2016 C conf
Static energy reduction by performance linked dynamic cache resizing.
VLSI-SoC
Shounak Chakraborty, Hemangee K. Kapoor
2015 — conf
Performance Constrained Static Energy Reduction Using Way-Sharing Target-Banks.
IPDPS Workshops
Shounak Chakraborty, Shirshendu Das, Hemangee K. Kapoor
2015 — conf
Power aware cache miss reduction by energy efficient victim retention.
VDAT
Shounak Chakraborty, Shirshendu Das, Hemangee K. Kapoor
2015 Misc conf
Static energy reduction by performance linked cache capacity management in tiled CMPs.
SAC
Hemangee K. Kapoor, Shirshendu Das, Shounak Chakraborty
2014 — conf
A New Recursive Partitioning Multicast Routing Algorithm for 3D Network-on-Chip.
VDAT
Narendra Kumar Meena, Hemangee K. Kapoor, Shounak Chakraborty