Shoun Matsunaga

16 papers A 2Journal 4Unranked 10

Year	Rank	Type	Title / Venue / Authors
2015	A	`conf`	Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm. DATE Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki
2014	—	`conf`	A Compact Soft-Error Tolerant Asynchronous TCAM Based on a Transistor/Magnetic-Tunnel-Junction Hybrid Dual-Rail Word Structure. ASYNC Naoya Onizawa, Shoun Matsunaga, Takahiro Hanyu
2014	J	`jnl`	Complementary 5T-4MTJ nonvolatile TCAM cell circuit with phase-selective parallel writing scheme. IEICE Electron. Express Shoun Matsunaga, Akira Mochizuki, Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2014	—	`conf`	Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM. NEWCAS Naoya Onizawa, Shoun Matsunaga, Takahiro Hanyu
2014	J	`jnl`	Design of an energy-efficient 2T-2MTJ nonvolatile TCAM based on a parallel-serial-combined search scheme. IEICE Electron. Express Shoun Matsunaga, Akira Mochizuki, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2014	J	`jnl`	High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism. IEEE Trans. Circuits Syst. I Regul. Pap. Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, Takahiro Hanyu
2014	—	`conf`	Soft-Delay-Error Evaluation in Content-Addressable Memory. ISMVL Naoya Onizawa, Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi, Takahiro Hanyu
2013	J	`jnl`	High-throughput CAM based on a synchronous overlapped search scheme. IEICE Electron. Express Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, Takahiro Hanyu
2012	—	`conf`	A 3.14 um VLSIC Shoun Matsunaga, Sadahiko Miura, Hiroaki Honjou, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2012	—	`conf`	Fine-grained power-gating scheme of a nonvolatile logic-in-memory circuit for low-power motion-vector extraction. NEWCAS Magdalena Sihotang, Shoun Matsunaga, Takahiro Hanyu
2012	—	`conf`	High-Throughput Low-Energy Content-Addressable Memory Based on Self-Timed Overlapped Search Mechanism. ASYNC Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Takahiro Hanyu
2012	—	`conf`	Implementation of a perpendicular MTJ-based read-disturb-tolerant 2T-2R nonvolatile TCAM based on a reversed current reading scheme. ASP-DAC Shoun Matsunaga, Masanori Natsui, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2012	—	`conf`	Quaternary 1T-2MTJ Cell Circuit for a High-Density and a High-Throughput Nonvolatile Bit-Serial CAM. ISMVL Shoun Matsunaga, Takahiro Hanyu
2011	—	`conf`	Design of a Low-Energy Nonvolatile Fully-Parallel Ternary CAM Using a Two-Level Segmented Match-Line Scheme. ISMVL Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Takahiro Hanyu
2009	A	`conf`	MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues. DATE Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2007	—	`conf`	Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic. ASP-DAC Shoun Matsunaga, Takahiro Hanyu, Hiromitsu Kimura, Takashi Nakamura, Hidemi Takasu