Shinobu Nagayama

77 papers B 3C 6Misc 2Journal 24Unranked 42
YearRankTypeTitle / Venue / Authors
2025 — conf
Binarization and Classification of RGB Images.
ISMVL
Tagir Nukenov, Kamila Abdiyeva, Oliver Keszöcze, Shinobu Nagayama, Martin Lukac
2025 — conf
Reducing the Cost of Clifford+T Quantum Gates.
ISMVL
Takehiro Ishioka, Martin Lukac, Shinobu Nagayama
2025 — conf
Representation of Rotation Symmetric Multiple-Valued Functions Using Decision Diagrams.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Martin Lukac
2025 J jnl
Synthetic Data-Based Algorithm Selection for Medical Image Classification Under Limited Data Availability.
Algorithms
Maxim Zhabinets, Benjamin Tyler, Martin Lukac, Shinobu Nagayama, Ferdinand Molnár, Michitaka Kameyama
2024 — conf
A Proposal of Equivalence Classes in Maximally Asymmetric Functions and Their Application to Benchmark Generation.
ISMVL
Rie Kometani, Shinobu Nagayama, Martin Lukac, Masato Inagi, Shin'ichi Wakabayashi
2024 J jnl
Functional Decomposition of Symmetric Multiple-Valued Functions and Their Compact Representation in Decision Diagrams.
IEICE Trans. Inf. Syst.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2024 — conf
Ternary Function Classification Using Machine Learning.
ISMVL
Martin Lukac, Krzysztof Podlaski, Shinobu Nagayama, Michitaka Kameyama
2023 — conf
Decomposition-Based Representation of Symmetric Multiple-Valued Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2023 J jnl
Feature Vectors Based on Wire Width and Distance for Lithography Hotspot Detection.
IPSJ Trans. Syst. LSI Des. Methodol.
Gaku Kataoka, Masahiro Yamamoto, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
2023 J jnl
On Representation of Maximally Asymmetric Functions Based on Decision Diagrams.
FLAP
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2023 J jnl
On the distribution of sensitivities of symmetric Boolean functions.
CoRR
Jon T. Butler, Tsutomu Sasao, Shinobu Nagayama
2022 J jnl
A Fast Method for Exactly Optimum Linear Decomposition of Index Generation Functions.
J. Multiple Valued Log. Soft Comput.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2022 — conf
On Decision Diagrams for Maximally Asymmetric Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2021 — conf
Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2020 — conf
On Optimum Linear Decomposition of Symmetric Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2020 — conf
Properties of Multiple-Valued Partition Functions.
ISMVL
Jon T. Butler, Tsutomu Sasao, Shinobu Nagayama
2019 — conf
A Dynamic Programming Based Method for Optimum Linear Decomposition of Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2018 — conf
A Nearest Neighbor Search Engine Using Distance-Based Hashing.
FPT
Toshitaka Ito, Yuri Itotani, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
2018 — conf
An Approximate Nearest Neighbor Search Algorithm Using Distance-Based Hashing.
DEXA (2)
Yuri Itotani, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
2018 — conf
An Exact Optimization Method Using ZDDs for Linear Decomposition of Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2018 J jnl
An Exact Optimization Method using ZDDs for Linear Decomposition of Symmetric Index Generation Functions.
FLAP
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2018 C conf
Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection.
DSD
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
2017 J jnl
A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions.
IEICE Trans. Inf. Syst.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2017 — conf
An Exact Optimization Algorithm for Linear Decomposition of Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2016 — conf
An Efficient Heuristic for Linear Decomposition of Index Generation Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2016 — conf
An efficient FPGA implementation of Mahalanobis distance-based outlier detection for streaming data.
FPT
Yuto Arai, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
2015 — conf
Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2014 J jnl
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating.
Inf. Media Technol.
Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
2014 J jnl
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating.
IPSJ Trans. Syst. LSI Des. Methodol.
Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
2014 — conf
An ILP-Based Optimal Circuit Mapping Method for PLDs.
IPDPS Workshops
Hiroki Nishiyama, Masato Inagi, Shin'ichi Wakabayashi, Shinobu Nagayama, Keisuke Inoue, Mineo Kaneko
2014 — conf
Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2014 J jnl
EVMDD-Based Analysis and Diagnosis Methods of Multi-State Systems with Multi-State Components.
J. Multiple Valued Log. Soft Comput.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2014 Misc conf
Fast Regular Expression Matching Based On Dual Glushkov NFA.
PSC
Ryutaro Kurai, Norihito Yasuda, Hiroki Arimura, Shinobu Nagayama, Shin-ichi Minato
2014 J jnl
On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems.
IEICE Trans. Inf. Syst.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2014 J jnl
Piecewise Arithmetic Expressions of Numeric Functions and Their Application to Design of Numeric Function Generators.
J. Multiple Valued Log. Soft Comput.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2014 J jnl
Simple Hybrid Scaling-Free CORDIC Solution for FPGAs.
Int. J. Reconfigurable Comput.
Leonid V. Moroz, Shinobu Nagayama, Taras Mykytiv, Ihor O. Kirenko, Taras Boretskyy
2014 — conf
System Probability Distribution Modeling Using MDDs.
ISMVL
Mitchell A. Thornton, Theodore W. Manikas, Stephen A. Szygenda, Shinobu Nagayama
2013 C conf
A Flexible and Compact Regular Expression Matching Engine Using Partial Reconfiguration for FPGA.
DSD
Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi
2013 C conf
A Multithreaded Parallel Global Routing Method with Overlapped Routing Regions.
DSD
Yasuhiro Shintani, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
2013 — conf
Minimization of the Number of Edges in an EVMDD by Variable Grouping for Fast Analysis of Multi-State Systems.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2012 — conf
Analysis of Multi-state Systems with Multi-state Components Using EVMDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2011 C conf
A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations.
DSD
Satoru Nakano, Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi
2011 B conf
An Efficient Hardware Matching Engine for Regular Expression with Nested Kleene Operators.
FPL
Yoichi Wakaba, Masato Inagi, Shin'ichi Wakabayashi, Shinobu Nagayama
2011 — conf
Numeric Function Generators Using Piecewise Arithmetic Expressions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2010 J jnl
A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams.
IEICE Trans. Inf. Syst.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2010 — conf
An FPGA-based text search engine for approximate regular expression matching.
FPT
Yuichiro Utan, Shin'ichi Wakabayashi, Shinobu Nagayama
2010 — conf
Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2010 J jnl
Programmable Architectures and Design Methods for Two-Variable Numeric Function Generators.
Inf. Media Technol.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2010 J jnl
Programmable Architectures and Design Methods for Two-Variable Numeric Function Generators.
IPSJ Trans. Syst. LSI Des. Methodol.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2009 — conf
A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set.
ERSA
Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama
2009 J jnl
Complexities of Graph-Based Representations for Elementary Functions.
IEEE Trans. Computers
Shinobu Nagayama, Tsutomu Sasao
2009 — conf
Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2008 — conf
A systolic regular expression pattern matching engine and its application to network intrusion detection.
FPT
Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama
2008 B conf
Numerical function generators using bilinear interpolation.
FPL
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2008 C conf
Programmable Numerical Function Generators for Two-Variable Functions.
DSD
Shinobu Nagayama, Jon T. Butler, Tsutomu Sasao
2008 — conf
Representations of Two-Variable Elementary Functions Using EVMDDs and their Applications to Function Generators.
ISMVL
Shinobu Nagayama, Tsutomu Sasao
2007 Misc conf
A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning.
PDPTA
Takayoshi Shimazu, Shin'ichi Wakabayashi, Shinobu Nagayama
2007 — conf
A Proposal of RM QRM-MLD with Independent Adaptive Control of Surviving Symbol Replica Candidates for MIMO-OFDM System.
VTC Fall
Shinobu Nagayama, Takeshi Hattori
2007 — conf
A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation.
FPT
Yoshihiro Kimura, Shin'ichi Wakabayashi, Shinobu Nagayama
2007 C conf
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation.
DSD
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2007 J jnl
Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2007 — conf
Numerical Function Generators Using Edge-Valued Binary Decision Diagrams.
ASP-DAC
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2007 J jnl
Numerical Function Generators Using LUT Cascades.
IEEE Trans. Computers
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
2007 — conf
Representations of Elementary Functions Using Edge-Valued MDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao
2006 — conf
A Proposal of QRM-MLD for Reduced Complexity of MLD to Detect MIMO Signals in Fading Environment.
VTC Fall
Shinobu Nagayama, Takeshi Hattori
2006 J jnl
Compact Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2006 — conf
FPGA implementation of tabu search for the quadratic assignment problem.
FPT
Shin'ichi Wakabayashi, Yoshihiro Kimura, Shinobu Nagayama
2006 — conf
Programmable numerical function generators based on quadratic approximation: architecture and synthesis method.
ASP-DAC
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
2006 — conf
Representations of Elementary Functions Using Binary Moment Diagrams.
ISMVL
Tsutomu Sasao, Shinobu Nagayama
2005 J jnl
Exact and Heuristic Minimization of the Average Path Length in Decision Diagrams.
J. Multiple Valued Log. Soft Comput.
Shinobu Nagayama, Alan Mishchenko, Tsutomu Sasao, Jon T. Butler
2005 J jnl
On the optimization of heterogeneous MDDs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shinobu Nagayama, Tsutomu Sasao
2005 B conf
Programmable Numerical Function Generators: Architectures and Synthesis Method.
FPL
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
2004 — conf
Minimization of memory size for heterogeneous MDDs.
ASP-DAC
Shinobu Nagayama, Tsutomu Sasao
2004 — conf
On the Minimization of Average Path Lengths for Heterogeneous MDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao
2003 J jnl
Compact Representations of Logic Functions Using Heterogeneous MDDs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shinobu Nagayama, Tsutomu Sasao
2003 — conf
Compact Representations of Logic Functions using Heterogeneous MDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao
2002 — conf
Representations of Logic Functions Using QRMDDs.
ISMVL
Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura