Shinji Tomita

47 papers A* 7A 5B 1C 3Misc 1Journal 11Unranked 18
YearRankTypeTitle / Venue / Authors
2018 J jnl
Evaluation of Three Quads Using Matrix Transpose.
J. Inf. Process.
Jiachao Zhang, Shin-ichiro Mori, Shinji Tomita
2012 C conf
Prototype Implementation of a GPU-based Interactive Coupled Fluid-Structure Simulation.
SNPD
Ryota Henmi, Yusuke Nishimura, Hiroaki Suzuki, Shinji Fukuma, Shin-ichiro Mori, Akinori Yamaguchi, Shinji Tomita
2011 J jnl
A Fine-Grained Runtime Power/Performance Optimization Method for Processors with Adaptive Pipeline Depth.
J. Comput. Sci. Technol.
Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita
2009 J jnl
An Instruction Scheduler for Dynamic ALU Cascading Adoption.
Inf. Media Technol.
Jun Yao, Kosuke Ogata, Hajime Shimada, Shinobu Miwa, Hiroshi Nakashima, Shinji Tomita
2008 J jnl
A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases.
IEICE Trans. Inf. Syst.
Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita
2008 — conf
Interactive Fluid Simulation and its Remote Steering Framework with Visual and Haptic Feedback.
MSV
Kesuke Hashimoto, Shin-ichiro Mori, Akinori Yamaguchi, Makoto Komatsubara, Shinji Tomita
2008 — conf
Low-Complexity Bypass Network Using Small RAM.
CDES
Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita
2008 A* conf
Vertex-preserving Cutting of Elastic Objects.
VR
Megumi Nakao, Kotaro Minato, Naoto Kume, Shin-ichiro Mori, Shinji Tomita
2007 J jnl
Optimal pipeline depth with pipeline stage unification adoption.
SIGARCH Comput. Archit. News
Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita
2006 — conf
Spatial analysis of centralization and decentralization in the population migration network.
APVIS
Shinji Tomita, Yukio Hayashi
2005 — conf
Program Phase Detection Based Dynamic Control Mechanisms for Pipeline Stage Unification Adoption.
ISHPC
Jun Yao, Hajime Shimada, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita
2004 Misc conf
Implementation of Cell-Projection Parallel Volume Rendering with Dynamic Load Balancing.
PDPTA
Motohiro Takayama, Yuki Shinomoto, Masahiro Goshima, Shin-ichiro Mori, Yasuhiko Nakashima, Shinji Tomita
2004 — conf
Mechanism Design for Environmental Issues.
JSAI Workshops
Shinji Tomita, Akira Namatame
2004 — conf
Simulating realistic force and shape of virtual cloth with adaptive meshes and its parallel implementation in OpenMP.
Parallel and Distributed Computing and Networks
Alam Mujahid, Koh Kakusho, Michihiko Minoh, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita
2003 — conf
A Web-Based Education Tool for Collaborative Learning of Assembly Programming.
ICWI
Yoshiro Imai, Shinji Tomita
2003 C conf
Bilateral Tradings with and without Strategic Thinking.
MABS
Shinji Tomita, Akira Namatame
2002 C conf
Development of an Education Tool for Computer System.
ICCE
Yoshiro Imai, Shinji Tomita, Haruo Niimi, Hitoshi Inomo, Wataru Shiraki, Hiroshi Ishikawa
2001 A* conf
A high-speed dynamic instruction scheduling scheme for superscalar processors.
MICRO
Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori
1999 J jnl
A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR.
Int. J. Parallel Program.
Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1999 — ed.
High Performance Computing, Second International Symposium, ISHPC'99, Kyoto, Japan, May 26-28, 1999, Proceedings
ISHPC
Constantine D. Polychronopoulos, Kazuki Joe, Akira Fukuda, Shinji Tomita
1998 — conf
Optimized Code Generation for Heterogeneous Computing Environment using Parallelizing Compiler TINPAR.
IEEE PACT
Shin-ya Goto, Atsushi Kubota, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997 — conf
A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR.
ISHPC
Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997 — conf
Efficient Goal Scheduling in Concurrent Logic Language using Type-Based Dependency Analysis.
ASIAN
Kazuhiko Ohno, Masahiko Ikawa, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997 — conf
Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications.
ISHPC
Jim Tørresen, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk
1997 — conf
Improvement of message communication in concurrent logic language.
PASCO
Kazuhiko Ohno, Masahiko Ikawa, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Masahiro Goshima
1996 A conf
Amon2: A Parallel Wire Routing Algorithm on a Torus Network Parallel Computer.
International Conference on Supercomputing
Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1995 B conf
A proposal of self-cleanup cache.
PACT
Shin-ichiro Mori, Masahiro Goshima, Hiroshi Nakashima, Shinji Tomita
1995 A conf
Amon: A Parallel Slice Algorithm for Wire Routing.
International Conference on Supercomputing
Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1995 — conf
General mapping of feed-forward neural networks onto an MIMD computer.
ICNN
Jim Tørresen, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk
1993 A conf
A distributed shared memory multiprocessor ASURA: memory and cache architecture.
SC
Shin-ichiro Mori, Hideki Saito, Masahiro Goshima, Mamoru Yanagihara, Takashi Tanaka, David Fraser, Kazuki Joe, Hiroyuki Nitta, Shinji Tomita
1992 A conf
Benchmarking a vector-processor prototype based on multithreaded streaming/FIFO vector (MSFV) architecture.
ICS
Tetsuo Hironaka, Takashi Hashimoto, Keizo Okazaki, Kazuaki J. Murakami, Shinji Tomita
1991 J jnl
DSNS (dynamically-hazard-resolved statically-code-scheduled, nonuniform superscalar): yet another superscalar processor architecture.
SIGARCH Comput. Archit. News
Morihiro Kuga, Kazuaki J. Murakami, Shinji Tomita
1991 J jnl
Toward advanced parallel processing: exploiting parallelism at task and instruction levels.
IEEE Micro
Akira Fukuda, Kazuaki J. Murakami, Shinji Tomita
1989 A* conf
SIMP (Single Instruction stream/Multiple Instruction Pipelining): A Novel High-Speed Single-Processor Architecture.
ISCA
Kazuaki J. Murakami, Naohiko Irie, Morihiro Kuga, Shinji Tomita
1989 — conf
The Kyushu University Reconfigurable Parallel Processor - Design Philosophy and Architecture.
IFIP Congress
Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita
1989 A conf
The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures.
ICS
Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita
1989 J jnl
The structure of experts: A parallel processor system for 3-dimensional graphics.
Syst. Comput. Jpn.
Haruo Niimi, Hiroshi Hagiwara, Shinji Tomita
1988 J jnl
An overview of the Kyushu University reconfigurable parallel processor.
SIGARCH Comput. Archit. News
Kazuaki J. Murakami, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita
1986 A* conf
A Computer with Low-Level Parallelism QA-2: Its Applications to 3-D Graphics and Prolog/Lisp Machines.
ISCA
Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, Hiroshi Hagiwara
1986 — conf
ISDN and X25 - Response.
IFIP Congress
Shinji Tomita
1984 A* conf
A parallel processor system for three-dimensional color graphics.
SIGGRAPH
Haruo Niimi, Yoshiro Imai, Masayoshi Murakami, Shinji Tomita, Hiroshi Hagiwara
1983 A* conf
A User-Microprogrammable, Local Host Computer With Low-Level Parallelism
ISCA
Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara
1980 J jnl
A Dynamically Microprogammable Computer with Low-Level Parallelism.
IEEE Trans. Computers
Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama
1980 — conf
Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism.
IFIP Congress
Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura
1980 A* conf
Performance evaluation and improvement of a dynamically microprogrammable computer with low-level parallelism.
MICRO
Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Hiroshi Hagiwara
1977 — conf
Hardware Organization of a Low Level Parallel Processor.
IFIP Congress
Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara
1971 — conf
On-Line, Real-Time, Multiple-Speech Output System.
IFIP Congress (1)
Toshiyuki Sakai, Kenji Ohtani, Shinji Tomita