Shingo Yoshizawa

75 papers B 2C 12Journal 25Unranked 36

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Evaluation of Signal Waveform Patterns for SSMS Underwater Acoustic Communication. ISPACS Hiroyuki Honda, Shingo Yoshizawa
2024	C	`conf`	Stixu: An Open-Source Idea for Planning Integrated Circuit Layouts Efficiently. TENCON Nicholas Overacker, James Stine, Michal Ptaszynski, Shingo Yoshizawa, Miho Kobayashi
2024	—	`conf`	Test and Evaluation of Underwater Acoustic Positioning Doppler Shift Correction Methods. ISPACS Yusuke Matsuura, Shingo Yoshizawa
2023	J	`jnl`	Foreword. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Hiroshi Tsutsui
2023	—	`conf`	Iterative Variable Threshold Method Resistant to Acoustic Reflections for Underwater Acoustic Positioning Systems. ISCIT Yuki Yamada, Shingo Yoshizawa, Takashi Saito, Hideki Sugimoto
2021	—	`conf`	Automatic Discrimination of Sound Propagation Path Using CNN for Underwater Acoustic Communication. ISCIT Etou Hiromu, Shingo Yoshizawa
2021	—	`conf`	RAKE Reception of OFDM Signals in Non-Line-of-Sight Underwater Acoustic Communication. ISPACS Takahiro Ishikawa, Shingo Yoshizawa
2021	—	`conf`	Simultaneous Multi-points Measurement in Underwater Acoustic Localization. ISPACS Atsushi Wada, Shingo Yoshizawa, Satoshi Yuasa, Hideki Sugimoto
2018	J	`jnl`	Parallel Resampling of OFDM Signals for Fluctuating Doppler Shifts in Underwater Acoustic Communication. J. Electr. Comput. Eng. Shingo Yoshizawa, Takashi Saito, Yusaku Mabuchi, Tomoya Tsukui, Shin-ichi Sawada
2017	—	`conf`	A simple current reference with low sensitivity to supply voltage and temperature. MIXDES Tatsuya Abe, Hiroshi Tanimoto, Shingo Yoshizawa
2017	—	`conf`	Comparator design for linearized statistical flash A-to-D converter. MIXDES Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2017	J	`jnl`	Data Selective Rake Reception for Underwater Acoustic Communication in Strong Multipath Interference. J. Electr. Comput. Eng. Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2017	—	`conf`	Interleaved Domain Interference Canceller for Low Latency IDMA System and Its VLSI Implementation. VTC Spring Tran Thi Thao Nguyen, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Shingo Yoshizawa, Hiroshi Ochi
2017	J	`jnl`	Low Latency IDMA With Interleaved Domain Architecture for 5G Communications. IEEE J. Emerg. Sel. Topics Circuits Syst. Tran Thi Thao Nguyen, Leonardo Lanante, Shingo Yoshizawa, Hiroshi Ochi
2017	—	`conf`	Low latency Interleave Division Multiple Access System. ICOIN Tran Thi Thao Nguyen, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Shingo Yoshizawa, Hiroshi Ochi
2016	J	`jnl`	Power Reduction of Variable Wordlength OFDM Receiver in Time-Varying Fading Channels by Monitoring Subcarrier SNRs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Daichi Sasaki, Hiroshi Tanimoto
2016	—	`conf`	SC-FDE vs OFDM: Performance comparison in shallow-sea underwater acoustic communication. ISPACS Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2015	—	`conf`	A low power OFDM receiver monitoring subcarrier SNRs in time-varying fading channels. ISCIT Shingo Yoshizawa, Hiroshi Tanimoto
2015	—	`conf`	A stochastic flash A-to-D converter with dynamic element matching technique. ISCIT Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2015	—	`conf`	ASIP implementation of a low complexity iterative BD precoder for MU-MIMO system. ISCIT Yuji Yokota, Shingo Yoshizawa, Hiroshi Ochi
2015	—	`conf`	Experimental evaluation of data selective rake reception for underwater acoustic communication. ISPACS Shun Akada, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2015	—	`conf`	FPGA implementation of stochastic flash A-to-D converter and its evaluation. ISCIT Hisato Takehata, Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2015	—	`conf`	Performance evaluation of antenna diversity with iterative decoding in OFDM-IDMA systems. DSP Akane Tajima, Shingo Yoshizawa, Hiroshi Tanimoto
2015	J	`jnl`	VLSI Implementation of an Interference Canceller Using Dual-Frame Processing for OFDM-IDMA Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Mai Nozaki, Hiroshi Tanimoto
2014	—	`conf`	Evaluation of diversity combining methods for underwater acoustic OFDM communication. ISPACS Ryuta Ishimoto, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2014	J	`jnl`	Low-Power Dynamic MIMO Detection for a 4×4 MIMO-OFDM Receiver. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nozomi Miyazaki, Shingo Yoshizawa, Yoshikazu Miyanaga
2014	—	`conf`	VLSI design of an interference canceller for QPSK OFDM-IDMA systems. APCCAS Mai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto
2013	J	`jnl`	A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems. VLSI Design Hiroki Iwaizumi, Shingo Yoshizawa, Yoshikazu Miyanaga
2013	J	`jnl`	A Robust Speech Communication into Smart Info-Media System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yoshikazu Miyanaga, Wataru Takahashi, Shingo Yoshizawa
2013	J	`jnl`	A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga
2013	—	`conf`	A VLSI design of an arrayed pipelined Tomlinson-Harashima precoder for MU-MIMO systems. APSIPA Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga
2013	B	`conf`	Effectiveness of cover and reflector in receiver antennas for MIMO line-of-sight channels. PIMRC Shingo Yoshizawa, Masahiro Sugitani, Yoshikazu Miyanaga
2013	J	`jnl`	Effects of Channel Features on Parameters of Genetic Algorithm for MIMO Detection. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga
2013	J	`jnl`	Evaluation of Cover and Reflector in Receiver Antennas for SM-MIMO Wireless Communications. J. Electr. Comput. Eng. Shingo Yoshizawa, Yoshikazu Miyanaga
2013	—	`conf`	Hardware implementation of an interference canceller for IDMA wireless communications. ISPACS Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga
2012	J	`jnl`	A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions. IEICE Trans. Inf. Syst. Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga
2012	C	`conf`	A low-power MMSE MIMO detector using dynamic voltage wordlength scaling for 4×4 MIMO-OFDM systems. ISCAS JaeSeong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga
2012	—	`conf`	A new high-speed and low-power LSI design of SVD-MIMO-OFDM systems. ISCIT Hiroki Iwaizumi, Shingo Yoshizawa, Yoshikazu Miyanaga
2012	J	`jnl`	Design of Area- and Power-Efficient Pipeline FFT Processors for 8x8 MIMO-OFDM Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Yoshikazu Miyanaga
2012	—	`conf`	Realistic Rician fading channel based optimal linear MIMO precoding evaluation. ISCCSP Xiaonan Nicole Shi, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga
2012	J	`jnl`	Variable wordlength soft-decision Viterbi decoder for power-efficient wireless LAN. Integr. JaeSeong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	C	`conf`	An area and power efficient pipeline FFT processor for 8×8 MIMO-OFDM systems. ISCAS Shingo Yoshizawa, Atsushi Orikasa, Yoshikazu Miyanaga
2011	J	`jnl`	Development and Outdoor Evaluation of an Experimental Platform in an 80-MHz Bandwidth 2×2 MIMO-OFDM System in 5.2-GHz Band. IEICE Trans. Inf. Syst. Hisayoshi Kano, Shingo Yoshizawa, Takashi Gunji, Shougo Okamoto, Morio Tawarayama, Yoshikazu Miyanaga
2011	—	`conf`	Development of an ASIP-based singular value decomposition processor in SVD-MIMO systems. ISPACS Takaya Kaji, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	—	`conf`	Development of wireless video transmission equipment by cooperating hardware and software in wideband MIMO-OFDM system. ISPACS Jun Takizawa, Takaya Kaji, Shingo Yoshizawa, Takashi Gunji, Morio Tawarayama, Yoshikazu Miyanaga
2011	—	`conf`	Evaluation of genetic algorithm-based detection for correlated MIMO fading channels. ISCIT Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	—	`conf`	Fading effects on parameter selection in genetic algorithm for MIMO detection. ISPACS Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	—	`conf`	LSI development of 8×8 single-user MIMO-OFDM for IEEE 802.11ac WLANs. ISCIT Shingo Yoshizawa, Daisuke Nakagawa, Nozomi Miyazaki, Takaya Kaji, Yoshikazu Miyanaga
2011	—	`conf`	Low-power dynamic MIMO detection for a 4×4 MIMO-OFDM receiver. ISPACS Nozomi Miyazaki, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	—	`conf`	MIMO precoding performance for correlated and estimated Rician fading. ISCIT Xiaonan Nicole Shi, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga
2011	J	`jnl`	VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4×4 MIMO-OFDM Receiver. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Hirokazu Ikeuchi, Yoshikazu Miyanaga
2010	B	`conf`	Development and outdoor evaluation of an experimental platform in an 80-MHz bandwidth 2×2 MIMO-OFDM system at 5.2-GHz band. PIMRC Shingo Yoshizawa, Shinya Odagiri, Yasuhiro Asai, Takashi Gunji, Takashi Saito, Yoshikazu Miyanaga
2010	—	`conf`	Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching. FPT Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga
2010	—	`conf`	Dynamic wordlength calibration to reduce power dissipation in wireless OFDM systems. APCCAS JaeSeong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga
2010	C	`conf`	Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver. ISCAS Shingo Yoshizawa, Hirokazu Ikeuchi, Yoshikazu Miyanaga
2009	J	`jnl`	New PAPR Reduction in an OFDM System Using Hybrid of PTS-CAPPR Methods with GA Coded Side Information Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Chusit Pradabpet, Shingo Yoshizawa, Yoshikazu Miyanaga, Kobchai Dejhan
2009	C	`conf`	VLSI Implementation of a 4×4 MIMO-OFDM transceiver with an 80-MHz Channel Bandwidth. ISCAS Shingo Yoshizawa, Yoshikazu Miyanaga
2008	C	`conf`	A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver. ISCAS Shingo Yoshizawa, Yasushi Yamauchi, Yoshikazu Miyanaga
2008	J	`jnl`	New PAPR Reduction in OFDM System Using Hybrid of PTS-APPR Methods with Coded Side Information Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Chusit Pradabpet, Shingo Yoshizawa, Yoshikazu Miyanaga, Kobchai Dejhan
2008	C	`conf`	Reconfigurable two-dimensional pipeline FFT processor in OFDM cognitive radio systems. ISCAS Shingo Yoshizawa, Kazuto Nishi, Yoshikazu Miyanaga
2008	J	`jnl`	Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation. IEEE Trans. Circuits Syst. I Regul. Pap. Shingo Yoshizawa, Yoshikazu Miyanaga
2008	J	`jnl`	VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 x 4 MIMO-OFDM Receiver. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Yasushi Yamauchi, Yoshikazu Miyanaga
2007	C	`conf`	Dynamic Reconfigurable Architecture for a Low-Power Despreader in VSF-OFCDM Systems. ISCAS Takayuki Sugawara, Shingo Yoshizawa, Yoshikazu Miyanaga
2007	C	`conf`	Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation. ISCAS Shingo Yoshizawa, Yoshikazu Miyanaga
2006	C	`conf`	300-Mbps OFDM baseband transceiver for wireless LAN systems. ISCAS Shingo Yoshizawa, Yoshikazu Miyanaga, Hiroshi Ochi, Yoshio Itoh, Nobuo Hataoka, Baiko Sai, Norihisa Takayama, Masaki Hirata
2006	C	`conf`	Direct control on modulation spectrum for noise-robust speech recognition and spectral subtraction. ISCAS Naoya Wada, Noboru Hayasaka, Shingo Yoshizawa, Yoshikazu Miyanaga
2006	J	`jnl`	Scalable architecture for word HMM-based speech recognition and VLSI implementation in complete system. IEEE Trans. Circuits Syst. I Regul. Pap. Shingo Yoshizawa, Naoya Wada, Noboru Hayasaka, Yoshikazu Miyanaga
2006	J	`jnl`	Tunable Wordlength Architecture for a Low Power Wireless OFDM Demodulator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Yoshikazu Miyanaga
2006	C	`conf`	Tunable word length architecture for low power wireless OFDM demodulator. ISCAS Shingo Yoshizawa, Yoshikazu Miyanaga
2006	—	`conf`	VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System. APCCAS Shingo Yoshizawa, Yoshikazu Miyanaga
2005	—	`conf`	Robust VLSI architecture for system-on-chip design and its implementation in Viterbi decoder. ISCAS (1) Yasuyuki Hatakawa, Shingo Yoshizawa, Yoshikazu Miyanaga
2005	J	`jnl`	VLSI Architecture for Robust Speech Recognition Systems and its Implementation on a Verification Platform. J. Robotics Mechatronics Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga
2004	J	`jnl`	Cepstral Amplitude Range Normalization for Noise Robust Speech Recognition. IEICE Trans. Inf. Syst. Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga
2004	—	`conf`	Cepstral gain normalization for noise robust speech recognition. ICASSP (1) Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga
2004	—	`conf`	Scalable architecture for word HMM-based speech recognition. ISCAS (3) Shingo Yoshizawa, Naoya Wada, Noboru Hayasaka, Yoshikazu Miyanaga