Shin-ichi O'Uchi

23 papers B 1C 2Journal 9Unranked 11
YearRankTypeTitle / Venue / Authors
2022 — conf
Low-Precision Quantization Techniques for Hardware-Implementation-Friendly BERT Models.
ISQED
Xinpei Zhang, Yi Ding, Mingfei Yu, Shin-ichi O'Uchi, Masahiro Fujita
2022 C conf
Short Floating-Point CNN Accelerator for Brain-Computer Interface to Decode Visual Information.
ISCAS
Shin-ichi O'Uchi, Ryusuke Hayashi
2019 B conf
Optimizing Weight Value Quantization for CNN Inference.
IJCNN
Wakana Nogami, Tsutomu Ikegami, Shin-ichi O'Uchi, Ryousei Takano, Tomohiro Kudoh
2019 J jnl
Perturbative GAN: GAN with Perturbation Layers.
CoRR
Yuma Kishi, Tsutomu Ikegami, Shin-ichi O'Uchi, Ryousei Takano, Wakana Nogami, Tomohiro Kudoh
2018 C conf
Image-Classifier Deep Convolutional Neural Network Training by 9-bit Dedicated Hardware to Realize Validation Accuracy and Energy Efficiency Superior to the Half Precision Floating Point Format.
ISCAS
Shin-ichi O'Uchi, Hiroshi Fuketa, Tsutomu Ikegami, Wakana Nogami, Takashi Matsukawa, Tomohiro Kudoh, Ryousei Takano
2017 J jnl
A 0.3-V 1-µW Super-Regenerative Ultrasound Wake-Up Receiver With Power Scalability.
IEEE Trans. Circuits Syst. II Express Briefs
Hiroshi Fuketa, Shin-ichi O'Uchi, Takashi Matsukawa
2017 J jnl
A Closed-Form Expression for Minimum Operating Voltage of CMOS D Flip-Flop.
IEEE Trans. Very Large Scale Integr. Syst.
Hiroshi Fuketa, Shin-ichi O'Uchi, Takashi Matsukawa
2017 J jnl
Fully Integrated, 100-mV Minimum Input Voltage Converter With Gate-Boosted Charge Pump Kick-Started by LC Oscillator for Energy Harvesting.
IEEE Trans. Circuits Syst. II Express Briefs
Hiroshi Fuketa, Shin-ichi O'Uchi, Takashi Matsukawa
2015 — conf
PBTI for N-type tunnel FinFETs.
ICICDT
Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shin-ichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara
2014 — conf
Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance.
ESSDERC
Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin-ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota
2014 J jnl
SOI CMOS Voltage Multiplier Circuits with Body Bias Control Technique for Battery-Less Wireless Sensor System.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yasushi Igarashi, Tadashi Chiba, Shin-ichi O'Uchi, Meishoku Masahara, Kunihiro Sakamoto
2014 — conf
Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration.
ESSDERC
Shinji Migita, Takashi Matsukawa, Takahiro Mori, Koichi Fukuda, Yukinori Morita, Wataru Mizubayashi, Kazuhiko Endo, Yongxun Liu, Shin-ichi O'Uchi, Meishoku Masahara, Hiroyuki Ota
2013 — conf
Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes.
ESSDERC
Wataru Mizubayashi, Koichi Fukuda, Takahiro Mori, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Shin-ichi O'Uchi, Yuki Ishikawa, Shinji Migita, Yukinori Morita, Akihito Tanabe, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara, Hiroyuki Ota
2013 J jnl
Independent-Double-Gate FinFET SRAM Technology.
IEICE Trans. Electron.
Kazuhiko Endo, Shin-ichi O'Uchi, Takashi Matsukawa, Yongxun Liu, Meishoku Masahara
2013 — conf
Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations.
ESSDERC
Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin-ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota
2012 J jnl
A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology.
IEICE Trans. Electron.
Shin-ichi O'Uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Tadashi Nakagawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara
2012 J jnl
High-Frequency Precise Characterization of Intrinsic FinFET Channel.
IEICE Trans. Electron.
Hideo Sakai, Shin-ichi O'Uchi, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Junichi Tsukada, Yuki Ishikawa, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara, Hiroki Ishikuro
2010 — conf
0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits.
ESSCIRC
Shin-ichi O'Uchi, Kazuhiko Endo, Yongxun Liu, Tadashi Nakagawa, Takashi Matsukawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara
2010 — conf
Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET.
CICC
Shin-ichi O'Uchi, Kazuhiko Endo, Yongxun Liu, Tadashi Nakagawa, Takashi Matsukawa, Yuki Ishikawa, Junichi Tsukada, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara
2008 J jnl
FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction.
IEICE Trans. Electron.
Shin-ichi O'Uchi, Meishoku Masahara, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki
2007 — conf
Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology.
CICC
Shin-ichi O'Uchi, Meishoku Masahara, Kunihiro Sakamoto, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki
2006 — conf
CMOS Integrated DNA Chip for Quantitative DNA Analysis.
ISSCC
Nobuhiro Gemma, Shin-ichi O'Uchi, Hideyuki Funaki, Jun Okada, Sadato Hongo
2002 — conf
An 8-qubit quantum-circuit processor.
ISCAS (5)
Shin-ichi O'Uchi, Minoru Fujishima, Koichiro Hoh