Shijin Duan - RankMe

34 papers A* 8A 2Misc 1Journal 16Unranked 7

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	ConQuER: Modular Architectures for Control and Bias Mitigation in IQP Quantum Generative Models. CoRR Xiaocheng Zou, Shijin Duan, Charles Fleming, Gaowen Liu, Ramana Rao Kompella, Shaolei Ren, Xiaolin Xu
2025	A*	`conf`	Holistic Design towards Resource-Stringent Binary Vector Symbolic Architecture. DAC Shijin Duan, Nuntipat Narkthong, Yukui Luo, Shaolei Ren, Xiaolin Xu
2025	J	`jnl`	ProDiF: Protecting Domain-Invariant Features to Secure Pre-Trained Models Against Extraction. CoRR Tong Zhou, Shijin Duan, Gaowen Liu, Charles Fleming, Ramana Rao Kompella, Shaolei Ren, Xiaolin Xu
2025	A*	`conf`	Towards Training Robustness Against Dynamic Errors in Quantum Machine Learning. DAC Shijin Duan, Gaowen Liu, Charles Fleming, Ramana Kompella, Xiaolin Xu, Shaolei Ren
2025	—	`conf`	Towards Vector Optimization on Low-Dimensional Vector Symbolic Architecture. CPAL Shijin Duan, Yejia Liu, Gaowen Liu, Ramana Rao Kompella, Shaolei Ren, Xiaolin Xu
2025	J	`jnl`	Towards Vector Optimization on Low-Dimensional Vector Symbolic Architecture. CoRR Shijin Duan, Yejia Liu, Gaowen Liu, Ramana Rao Kompella, Shaolei Ren, Xiaolin Xu
2024	A*	`conf`	GraphCroc: Cross-Correlation Autoencoder for Graph Structural Reconstruction. NeurIPS Shijin Duan, Ruyi Ding, Jiaxing He, Aidong Adam Ding, Yunsi Fei, Xiaolin Xu
2024	J	`jnl`	GraphCroc: Cross-Correlation Autoencoder for Graph Structural Reconstruction. CoRR Shijin Duan, Ruyi Ding, Jiaxing He, Aidong Adam Ding, Yunsi Fei, Xiaolin Xu
2024	—	`conf`	MicroVSA: An Ultra-Lightweight Vector Symbolic Architecture-based Classifier Library for Always-On Inference on Tiny Microcontrollers. ASPLOS (2) Nuntipat Narkthong, Shijin Duan, Shaolei Ren, Xiaolin Xu
2024	J	`jnl`	SSNet: A Lightweight Multi-Party Computation Scheme for Practical Privacy-Preserving Machine Learning Service in the Cloud. CoRR Shijin Duan, Chenghong Wang, Hongwu Peng, Yukui Luo, Wujie Wen, Caiwen Ding, Xiaolin Xu
2024	J	`jnl`	Scheduled Knowledge Acquisition on Lightweight Vector Symbolic Architectures for Brain-Computer Interfaces. CoRR Yejia Liu, Shijin Duan, Xiaolin Xu, Shaolei Ren
2023	A*	`conf`	AQ2PNN: Enabling Two-party Privacy-Preserving Deep Neural Network Inference with Adaptive Quantization. MICRO Yukui Luo, Nuo Xu, Hongwu Peng, Chenghong Wang, Shijin Duan, Kaleel Mahmood, Wujie Wen, Caiwen Ding, Xiaolin Xu
2023	—	`conf`	Achieving Certified Robustness for Brain-Inspired Low-Dimensional Computing Classifiers. INFOCOM Workshops Fangfang Yang, Shijin Duan, Xiaolin Xu, Shaolei Ren
2023	J	`jnl`	MetaLDC: Meta Learning of Low-Dimensional Computing Classifiers for Fast On-Device Adaption. CoRR Yejia Liu, Shijin Duan, Xiaolin Xu, Shaolei Ren
2023	A	`conf`	MirrorNet: A TEE-Friendly Framework for Secure On-Device DNN Inference. ICCAD Ziyu Liu, Yukui Luo, Shijin Duan, Tong Zhou, Xiaolin Xu
2023	J	`jnl`	MirrorNet: A TEE-Friendly Framework for Secure On-device DNN Inference. CoRR Ziyu Liu, Yukui Luo, Shijin Duan, Tong Zhou, Xiaolin Xu
2023	A*	`conf`	PASNet: Polynomial Architecture Search Framework for Two-party Computation-based Secure Neural Network Deployment. DAC Hongwu Peng, Shanglin Zhou, Yukui Luo, Nuo Xu, Shijin Duan, Ran Ran, Jiahui Zhao, Chenghong Wang, Tong Geng, Wujie Wen, Xiaolin Xu, Caiwen Ding
2023	J	`jnl`	PASNet: Polynomial Architecture Search Framework for Two-party Computation-based Secure Neural Network Deployment. CoRR Hongwu Peng, Shanglin Zhou, Yukui Luo, Nuo Xu, Shijin Duan, Ran Ran, Jiahui Zhao, Chenghong Wang, Tong Geng, Wujie Wen, Xiaolin Xu, Caiwen Ding
2023	J	`jnl`	RRNet: Towards ReLU-Reduced Neural Network for Two-party Computation Based Private Inference. CoRR Hongwu Peng, Shanglin Zhou, Yukui Luo, Nuo Xu, Shijin Duan, Ran Ran, Jiahui Zhao, Shaoyi Huang, Xi Xie, Chenghong Wang, Tong Geng, Wujie Wen, Xiaolin Xu, Caiwen Ding
2023	A*	`conf`	VertexSerum: Poisoning Graph Neural Networks for Link Inference. ICCV Ruyi Ding, Shijin Duan, Xiaolin Xu, Yunsi Fei
2023	J	`jnl`	VertexSerum: Poisoning Graph Neural Networks for Link Inference. CoRR Ruyi Ding, Shijin Duan, Xiaolin Xu, Yunsi Fei
2022	J	`jnl`	A Brain-Inspired Low-Dimensional Computing Classifier for Inference on Tiny Devices. CoRR Shijin Duan, Xiaolin Xu, Shaolei Ren
2022	—	`conf`	A Cautionary Note on Building Multi-tenant Cloud-FPGA as a Secure Infrastructure. FPT Yukui Luo, Yuheng Zhang, Shijin Duan, Xiaolin Xu
2022	A	`conf`	An Integrity Checking Framework for AXI Protocol in Multi-tenant FPGA. FPGA Yukui Luo, Yuheng Zhang, Shijin Duan, Xiaolin Xu
2022	J	`jnl`	FPGAPRO: A Defense Framework Against Crosstalk-Induced Secret Leakage in FPGA. ACM Trans. Design Autom. Electr. Syst. Yukui Luo, Shijin Duan, Xiaolin Xu
2022	J	`jnl`	HDLock: Exploiting Privileged Encoding to Protect Hyperdimensional Computing Models against IP Stealing. CoRR Shijin Duan, Shaolei Ren, Xiaolin Xu
2022	A*	`conf`	HDLock: exploiting privileged encoding to protect hyperdimensional computing models against IP stealing. DAC Shijin Duan, Shaolei Ren, Xiaolin Xu
2022	J	`jnl`	LeHDC: Learning-Based Hyperdimensional Computing Classifier. CoRR Shijin Duan, Yejia Liu, Shaolei Ren, Xiaolin Xu
2022	A*	`conf`	LeHDC: learning-based hyperdimensional computing classifier. DAC Shijin Duan, Yejia Liu, Shaolei Ren, Xiaolin Xu
2022	Misc	`conf`	NNReArch: A Tensor Program Scheduling Framework Against Neural Network Architecture Reverse Engineering. FCCM Yukui Luo, Shijin Duan, Cheng Gongye, Yunsi Fei, Xiaolin Xu
2022	J	`jnl`	NNReArch: A Tensor Program Scheduling Framework Against Neural Network Architecture Reverse Engineering. CoRR Yukui Luo, Shijin Duan, Cheng Gongye, Yunsi Fei, Xiaolin Xu
2021	—	`conf`	A Survey of Recent Attacks and Mitigation on FPGA Systems. ISVLSI Shijin Duan, Wenhao Wang, Yukui Luo, Xiaolin Xu
2021	—	`conf`	Deep Neural Network Security From a Hardware Perspective. NANOARCH Tong Zhou, Yuheng Zhang, Shijin Duan, Yukui Luo, Xiaolin Xu
2021	—	`conf`	HDCOG: A Lightweight Hyperdimensional Computing Framework with Feature Extraction. NANOARCH Shijin Duan, Xiaolin Xu