Shihui Yin - RankMe

47 papers A* 2A 6B 2C 1Misc 3Journal 16Unranked 16

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference. IEEE J. Solid State Circuits Bo Zhang, Shihui Yin, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-sun Seo, Mingoo Seok
2022	—	`conf`	Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability. VLSI Technology and Circuits Jingrui Guo, Ying Sun, Lingfei Wang, Xinlv Duan, Kailiang Huang, Zhaogui Wang, Junxiao Feng, Qian Chen, Shijie Huang, Lihua Xu, Di Geng, Guangfan Jiao, Shihui Yin, Zhengbo Wang, Weiliang Jing, Ling Li, Ming Liu
2022	J	`jnl`	Efficient continual learning at the edge with progressive segmented training. Neuromorph. Comput. Eng. Xiaocong Du, Shreyas Kolala Venkataramanaiah, Zheng Li, Han-Sok Suh, Shihui Yin, Gokul Krishnan, Frank Liu, Jae-sun Seo, Yu Cao
2022	J	`jnl`	Improving DNN Hardware Accuracy by In-Memory Computing Noise Injection. IEEE Des. Test Sai Kiran Cherupally, Jian Meng, Adnan Siraj Rakin, Shihui Yin, Mingoo Seok, Deliang Fan, Jae-sun Seo
2022	—	`conf`	Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. VLSI Technology and Circuits Kailiang Huang, Xinlv Duan, Junxiao Feng, Ying Sun, Congyan Lu, Chuanke Chen, Guangfan Jiao, Xinpeng Lin, Jinhai Shao, Shihui Yin, Jiazhen Sheng, Zhaogui Wang, Wenqiang Zhang, Xichen Chuai, Jiebin Niu, Wenwu Wang, Ying Wu, Weiliang Jing, Zhengbo Wang, Jeffrey Xu, Guanhua Yang, Di Geng, Ling Li, Ming Liu
2021	—	`conf`	Characterization and Mitigation of Relaxation Effects on Multi-level RRAM based In-Memory Computing. IRPS Wangxin He, Wonbo Shim, Shihui Yin, Xiaoyu Sun, Deliang Fan, Shimeng Yu, Jae-sun Seo
2021	A*	`conf`	Leveraging Noise and Aggressive Quantization of In-Memory Computing for Robust DNN Hardware Against Adversarial Input and Weight Attacks. DAC Sai Kiran Cherupally, Adnan Siraj Rakin, Shihui Yin, Mingoo Seok, Deliang Fan, Jae-sun Seo
2021	A	`conf`	Modeling and Optimization of SRAM-based In-Memory Computing Hardware Design. DATE Jyotishman Saikia, Shihui Yin, Sai Kiran Cherupally, Bo Zhang, Jian Meng, Mingoo Seok, Jae-sun Seo
2021	—	`conf`	PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference. VLSI Circuits Shihui Yin, Bo Zhang, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Mingoo Seok, Jae-sun Seo
2020	J	`jnl`	A Smart Hardware Security Engine Combining Entropy Sources of ECG, HRV, and SRAM PUF for Authentication and Secret Key Generation. IEEE J. Solid State Circuits Sai Kiran Cherupally, Shihui Yin, Deepak Kadetotad, ChiSung Bae, Sang Joon Kim, Jae-sun Seo
2020	J	`jnl`	An 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity for On-Device Speech Recognition. IEEE J. Solid State Circuits Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2020	A	`conf`	An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays. DATE Shruti R. Kulkarni, Shihui Yin, Jae-sun Seo, Bipin Rajendran
2020	J	`jnl`	C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism. IEEE J. Solid State Circuits Zhewei Jiang, Shihui Yin, Jae-sun Seo, Mingoo Seok
2020	—	`conf`	Deep Neural Network Training Accelerator Designs in ASIC and FPGA. ISOCC Shreyas K. Venkataramanaiah, Shihui Yin, Yu Cao, Jae-sun Seo
2020	J	`jnl`	ECG Authentication Hardware Design With Low-Power Signal Processing and Neural Network Optimization With Low Precision and Structured Compression. IEEE Trans. Biomed. Circuits Syst. Sai Kiran Cherupally, Shihui Yin, Deepak Kadetotad, Gaurav Srivastava, ChiSung Bae, Sang Joon Kim, Jae-sun Seo
2020	A*	`conf`	Efficient and Modularized Training on FPGA for Real-time Applications. IJCAI Shreyas Kolala Venkataramanaiah, Xiaocong Du, Zheng Li, Shihui Yin, Yu Cao, Jae-sun Seo
2020	—	`—`	Energy-Efficient Circuit and Architecture Designs for Intelligent Systems. Shihui Yin
2020	A	`conf`	FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High Bandwidth Memory. ICCAD Shreyas K. Venkataramanaiah, Han-Sok Suh, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2020	J	`jnl`	Vesti: Energy-Efficient In-Memory Computing Accelerator for Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. Shihui Yin, Zhewei Jiang, Minkyu Kim, Tushar Gupta, Mingoo Seok, Jae-sun Seo
2020	J	`jnl`	XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks. IEEE J. Solid State Circuits Shihui Yin, Zhewei Jiang, Jae-sun Seo, Mingoo Seok
2019	J	`jnl`	A 1.06- $\mu$ W Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring. IEEE J. Solid State Circuits Shihui Yin, Minkyu Kim, Deepak Kadetotad, Yang Liu, ChiSung Bae, Sang Joon Kim, Yu Cao, Jae-sun Seo
2019	—	`conf`	A Smart Hardware Security Engine Combining Entropy Sources of ECG, HRV and SRAM PUF for Authentication and Secret Key Generation. A-SSCC Sai Kiran Cherupally, Shihui Yin, Deepak Kadetotad, ChiSung Bae, Sang Joon Kim, Jae-sun Seo
2019	B	`conf`	Automatic Compiler Based FPGA Accelerator for CNN Training. FPL Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2019	J	`jnl`	Automatic Compiler Based FPGA Accelerator for CNN Training. CoRR Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2019	—	`conf`	C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. ESSCIRC Zhewei Jiang, Shihui Yin, Jae-sun Seo, Mingoo Seok
2019	C	`conf`	ECG Authentication Neural Network Hardware Design with Collective Optimization of Low Precision and Structured Compression. ISCAS Sai Kiran Cherupally, Gaurav Srivastava, Shihui Yin, Deepak Kadetotad, ChiSung Bae, Sang Joon Kim, Jae-sun Seo
2019	J	`jnl`	High-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS. CoRR Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo
2019	—	`conf`	Inference engine benchmarking across technological platforms from CMOS to RRAM. MEMSYS Xiaochen Peng, Minkyu Kim, Xiaoyu Sun, Shihui Yin, Titash Rakshit, Ryan M. Hatcher, Jorge A. Kittl, Jae-sun Seo, Shimeng Yu
2019	Misc	`conf`	Joint Optimization of Quantization and Structured Sparsity for Compressed Deep Neural Networks. ICASSP Gaurav Srivastava, Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2019	A	`conf`	K-Nearest Neighbor Hardware Accelerator Using In-Memory Computing SRAM. ISLPED Jyotishman Saikia, Shihui Yin, Zhewei Jiang, Mingoo Seok, Jae-sun Seo
2019	J	`jnl`	Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning. IEEE Micro Shihui Yin, Jae-sun Seo, Yulhwa Kim, Xu Han, Hugh J. Barnaby, Shimeng Yu, Yandong Luo, Wangxin He, Xiaoyu Sun, Jae-Joon Kim
2019	—	`conf`	Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays. ICECS Shruti R. Kulkarni, Deepak Vinayak Kadetotad, Shihui Yin, Jae-sun Seo, Bipin Rajendran
2019	Misc	`conf`	Vesti: An In-Memory Computing Processor for Deep Neural Networks Acceleration. ACSSC Zhewei Jiang, Shihui Yin, Minkyu Kim, Tushar Gupta, Mingoo Seok, Jae-sun Seo
2019	—	`conf`	XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing Mechanism. ACM Great Lakes Symposium on VLSI Zhewei Jiang, Shihui Yin, Jae-sun Seo, Mingoo Seok
2018	—	`conf`	A Parallel RRAM Synaptic Array Architecture for Energy-Efficient Recurrent Neural Networks. SiPS Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo, Chaitali Chakrabarti
2018	J	`jnl`	Environment-Adaptable Fast Multi-Resolution (EAF-MR) optimization in large-scale RF-FPGA systems. EURASIP J. Wirel. Commun. Netw. Minhee Jun, Rohit Negi, Shihui Yin, Mohamed Baker Alawieh, Fa Wang, Megha Sunny, Tamal Mukherjee, Xin Li
2018	J	`jnl`	Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression. CoRR Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo
2018	A	`conf`	XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks. DATE Xiaoyu Sun, Shihui Yin, Xiaochen Peng, Rui Liu, Jae-sun Seo, Shimeng Yu
2017	J	`jnl`	Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activations. CoRR Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
2017	—	`conf`	Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations. BioCAS Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
2017	—	`conf`	Designing ECG-based physical unclonable function for security of wearable devices. EMBC Shihui Yin, ChiSung Bae, Sang Joon Kim, Jae-sun Seo
2017	A	`conf`	Efficient programming of reconfigurable radio frequency (RF) systems. ICCAD Mohamed Baker Alawieh, Fa Wang, Jun Tao, Shihui Yin, Minhee Jun, Xin Li, Tamal Mukherjee, Rohit Negi
2017	Misc	`conf`	Minimizing area and energy of deep learning hardware design using collective low precision and structured compression. ACSSC Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo
2016	—	`conf`	Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification. ASP-DAC Fa Wang, Shihui Yin, Minhee Jun, Xin Li, Tamal Mukherjee, Rohit Negi, Larry T. Pileggi
2015	—	`conf`	Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data. ASP-DAC Ying-Chih Wang, Shihui Yin, Minhee Jun, Xin Li, Lawrence T. Pileggi, Tamal Mukherjee, Rohit Negi
2015	B	`conf`	Phase Noise Impairment and Environment-Adaptable Fast (EAF) Optimization for Programming of Reconfigurable Radio Frequency (RF) Receivers. GLOBECOM Minhee Jun, Rohit Negi, Shihui Yin, Fa Wang, Megha Sunny, Tamal Mukherjee, Xin Li
2014	—	`conf`	Environment-Adaptable Efficient Optimization for Programming of Reconfigurable Radio Frequency (RF) Receivers. MILCOM Minhee Jun, Rohit Negi, Jun Tao, Ying-Chih Wang, Shihui Yin, Tamal Mukherjee, Xin Li, Lawrence T. Pileggi