Shiann-Rong Kuang

21 papers C 3Journal 12Unranked 6
YearRankTypeTitle / Venue / Authors
2022 — conf
Hardware Implementation of an Automatic Color Equalization Algorithm for Real-time Image Enhancement.
MCSoC
Xiang-yu Chen, Yu-Hsiang Wang, Yao-Song Zhang, Yen-Jui Chen, Shiann-Rong Kuang
2017 — conf
Design and implementation of a low-cost guided image filter for underwater image enhancement.
DSC
Cheng-Hao Chang, I-Chang Huang, Mu-Fan Lin, Shiann-Rong Kuang
2016 J jnl
An Efficient Radix-4 Scalable Architecture for Montgomery Modular Multiplication.
IEEE Trans. Circuits Syst. II Express Briefs
Shiann-Rong Kuang, Chih-Yuan Liang, Chun-Chi Chen
2016 J jnl
Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication.
IEEE Trans. Very Large Scale Integr. Syst.
Shiann-Rong Kuang, Kun-Yi Wu, Ren-Yao Lu
2015 — conf
An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development support.
VLSI-DAT
Hsu-Kang Dow, Ching-Hua Huang, Chun-Hung Lai, Kai-Hsiang Tsao, Sheng-Chih Tseng, Kun-Yi Wu, Ting-Hsuan Wu, Ho-Chun Yang, Da-Jing Zhang-Jian, Yun-Nan Chang, Steve Haga, Shen-Fu Hsiao, Ing-Jer Huang, Shiann-Rong Kuang, Chung-Nan Lee
2014 J jnl
Efficient architecture and hardware implementation of hybrid fuzzy-Kalman filter for workload prediction.
Integr.
Shiann-Rong Kuang, Kun-Yi Wu, Bao-Chen Ke, Jia-Huei Yeh, Hao-Yi Jheng
2013 J jnl
An exact method for estimating maximum errors of multi-mode floating-point iterative booth multiplier.
Int. J. Comput. Sci. Eng.
Kun-Yi Wu, Shiann-Rong Kuang, Kee-Khuan Yu
2013 J jnl
Energy-Efficient High-Throughput Montgomery Modular Multipliers for RSA Cryptosystems.
IEEE Trans. Very Large Scale Integr. Syst.
Shiann-Rong Kuang, Jiun-Ping Wang, Kai-Cheng Chang, Huan-Wei Hsu
2013 J jnl
Energy-Efficient Multiple-Precision Floating-Point Multiplier for Embedded Applications.
J. Signal Process. Syst.
Shiann-Rong Kuang, Kun-Yi Wu, Kee-Khuan Yu
2013 C conf
Multiple-mode floating-point multiply-add fused unit for trading accuracy with power consumption.
ICIS
Kun-Yi Wu, Chih-Yuan Liang, Kee-Khuan Yu, Shiann-Rong Kuang
2011 J jnl
High-Accuracy Fixed-Width Modified Booth Multipliers for Lossy Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Jiun-Ping Wang, Shiann-Rong Kuang, Shish-Chang Liang
2010 J jnl
Design of Power-Efficient Configurable Booth Multiplier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shiann-Rong Kuang, Jiun-Ping Wang
2010 J jnl
Variable-Latency Floating-Point Multipliers for Low-Power Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Shiann-Rong Kuang, Jiun-Ping Wang, Hong-Yi Huang
2009 J jnl
Modified Booth Multipliers With a Regular Partial Product Array.
IEEE Trans. Circuits Syst. II Express Briefs
Shiann-Rong Kuang, Jiun-Ping Wang, Cang-Yuan Guo
2007 — conf
Area-Efficient Signed Fixed-Width Multipliers with Low-Error Compensation Circuit.
SiPS
Jiun-Ping Wang, Shiann-Rong Kuang
2007 J jnl
Design of power-efficient pipelined truncated multipliers with various output precision.
IET Comput. Digit. Tech.
Shiann-Rong Kuang, Jiun-Ping Wang
2005 — conf
Partitioning and Pipelined Scheduling of Embedded System Using Integer Linear Programming.
ICPADS (2)
Shiann-Rong Kuang, Chin-Yang Chen, Ren-Zheng Liao
2002 J jnl
Design of a dynamic pipelined architecture for fuzzy color correction.
IEEE Trans. Very Large Scale Integr. Syst.
Jer-Min Jou, Shiann-Rong Kuang, Yeu-Horng Shiau, Ren-Der Chen
1999 — conf
A New Pipelined Architecture for Fuzzy Color Correction.
ASP-DAC
Jer-Min Jou, Shiann-Rong Kuang, Yeu-Horng Shiau
1994 C conf
Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization.
ISCAS
Jer-Min Jou, Ren-Der Chen, Shiann-Rong Kuang
1993 C conf
Library-Adaptively Integrated Data Path Synthesis for DSP Systems.
ICCD
Jer-Min Jou, Shiann-Rong Kuang