Shi-Hao Chen

17 papers A 3Misc 1Journal 5Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
A 28-nm 1.3-mW Speech-to-Text Accelerator for Edge AI Devices.
IEEE J. Solid State Circuits
Yu-Hsuan Tsai, Yi-Cheng Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Shi-Hao Chen, Chi-Shi Chen, Chia-Hsiang Yang
2024 J jnl
Application of Generative Adversarial Networks for Virtual Silicon Data Generation and Design-Technology Co-Optimization: A Study on WAT and CP.
IEEE Access
Shih-Nung Chen, Shi-Hao Chen
2019 — conf
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs.
VLSI-DAT
Yu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang
2018 — conf
Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM.
ISQED
Jheng-Yi Chen, Ming-Yu Chang, Shi-Hao Chen, Jia-Wei Lee, Meng-Hsueh Chiang
2018 — conf
DVFS Binning Using Machine-Learning Techniques.
ITC-Asia
Keng-Wei Chang, Chun-Yang Huang, Szu-Pang Mu, Jian-Min Huang, Shi-Hao Chen, Mango C.-T. Chao
2016 J jnl
Statistical Framework and Built-In Self-Speed-Binning System for Speed Binning Using On-Chip Ring Oscillators.
IEEE Trans. Very Large Scale Integr. Syst.
Szu-Pang Mu, Mango C.-T. Chao, Shi-Hao Chen, Yi-Ming Wang
2014 A conf
Cost-effective decap selection for beyond die power integrity.
DATE
Yi-En Chen, Tu-Hsiung Tsai, Shi-Hao Chen, Hung-Ming Chen
2014 — conf
Power-switch routing for reducing dynamic IR drop in multi-domain MTCMOS designs.
VLSI-DAT
Yi-Ming Wang, Mango Chia-Tso Chao, Shi-Hao Chen, Hung-Chun Li
2014 J jnl
Practical Routability-Driven Design Flow for Multilayer Power Networks Using Aluminum-Pad Layer.
IEEE Trans. Very Large Scale Integr. Syst.
Wen-Hsiang Chang, Mango Chia-Tso Chao, Shi-Hao Chen
2014 — conf
Routability-driven bump assignment for chip-package co-design.
ASP-DAC
Meng-Ling Chen, Tu-Hsiung Tsai, Hung-Ming Chen, Shi-Hao Chen
2013 J jnl
Power-Up Sequence Control for MTCMOS Designs.
IEEE Trans. Very Large Scale Integr. Syst.
Shi-Hao Chen, Youn-Long Lin, Mango Chia-Tso Chao
2013 Misc conf
Testing retention flip-flops in power-gated designs.
VTS
Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango Chia-Tso Chao
2012 — conf
An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs.
ASP-DAC
Yi-Ming Wang, Shi-Hao Chen, Mango Chia-Tso Chao
2012 A conf
On effective flip-chip routing via pseudo single redistribution layer.
DATE
Hsin-Wu Hsu, Meng-Ling Chen, Hung-Ming Chen, Hung-Chun Li, Shi-Hao Chen
2010 A conf
Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs.
ICCAD
Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai
2008 — conf
Experiences of low power design implementation and verification.
ASP-DAC
Shi-Hao Chen, Jiing-Yuan Lin
2007 — conf
DFM/DFY practices during physical designs for timing, signal integrity, and power.
ASP-DAC
Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai