Sherif A. Tawfik

24 papers A 1C 7Journal 6Unranked 10

Year	Rank	Type	Title / Venue / Authors
2011	J	`jnl`	Multi-Threshold Voltage FinFET Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2010	J	`jnl`	Dual Supply Voltages and Dual Clock Frequencies for Lower Clock Power and Suppressed Temperature-Gradient-Induced Clock Skew. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	FinFET domino logic with independent gate keepers. Microelectron. J. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	Low Power and High Speed Multi Threshold Voltage Interface Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	Robust FinFET Memory Circuits with P-Type Data Access Transistors for Higher Integration Density and Reduced Leakage Power. J. Low Power Electron. Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic. APCCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations. ISQED Sherif A. Tawfik, Volkan Kursun
2008	J	`jnl`	Clock Distribution Networks with Gradual Signal Transition Time Relaxation for Reduced Power Consumption. J. Circuits Syst. Comput. Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Compact FinFET Memory Circuits with P-Type Data Access Transistors for Low Leakage and Robust Operation. ISQED Sherif A. Tawfik, Volkan Kursun
2008	C	`conf`	Dynamic wordline voltage swing for low leakage and stable static memory banks. ISCAS Sherif A. Tawfik, Volkan Kursun
2008	C	`conf`	Low power and robust 7T dual-Vt SRAM circuit. ISCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption. APCCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ISQED Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
2008	C	`conf`	Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. ISCAS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	An independent-gate FinFET SRAM cell for high data stability and enhanced integration density. SoCC Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption. ICECS Sherif A. Tawfik, Volkan Kursun
2007	A	`conf`	Dual signal frequencies and voltage levels for low power and temperature-gradient tolerant clock distribution. ISLPED Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew. ISQED Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	Leakage-Aware Design of Nanometer SoC. ISCAS Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu
2007	—	`conf`	Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density. ICECS Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. ISCAS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Low-power high-performance FinFET sequential circuits. SoCC Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	Multi-Vth Level Conversion Circuits for Multi-VDD Systems. ISCAS Sherif A. Tawfik, Volkan Kursun
2006	C	`conf`	Algorithmic truncation of minimax polynomial coefficients. ISCAS Sherif A. Tawfik, Hossam A. H. Fahmy