Shengwen Liang

52 papers A* 17A 9B 4C 1Misc 1Journal 16Unranked 4

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A data-centric chip design agent framework for Verilog code generation. ACM Trans. Design Autom. Electr. Syst. Kaiyan Chang, Wenlong Zhu, Kun Wang, Xinyang He, Nan Yang, Zhirong Chen, Dantong Jin, Cangyuan Li, Yunhao Zhou, Hao Yan, Zhuoliang Zhao, Yuan Cheng, Mengdi Wang, Shengwen Liang, Yinhe Han, Xiaowei Li, Huawei Li, Ying Wang
2025	J	`jnl`	APoX-M: Accelerate deep point cloud analysis via adaptive graph construction. Integr. Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2025	J	`jnl`	CodeV-R1: Reasoning-Enhanced Verilog Generation. CoRR Yaoyu Zhu, Di Huang, Han-Qi Lyu, Xiaoyun Zhang, Chongxiao Li, Wenxuan Shi, Yutong Wu, Jianan Mu, Jinghua Wang, Yang Zhao, Pengwei Jin, Shuyao Cheng, Shengwen Liang, Xishan Zhang, Rui Zhang, Zidong Du, Qi Guo, Xing Hu, Yunji Chen
2025	A	`conf`	DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs. SC Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2025	A*	`conf`	EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components. DAC Mingjun Wang, Hui Wang, Jianan Mu, Xinyu Zhang, Bin Sun, Yihan Wen, Zizhen Liu, Feng Gu, Jun Gao, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li
2025	A	`conf`	ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy. DATE Jiaping Tang, Jianan Mu, Silin Liu, Zizhen Liu, Feng Gu, Xinyu Zhang, Leyan Wang, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li
2025	A*	`conf`	FrontOrder: Frontier-Guided Graph Reordering. ICDE Xinmiao Zhang, Cheng Liu, Shengwen Liang, Chenwei Xiong, Yu Zhang, Lei Zhang, Huawei Li, Xiaowei Li
2025	B	`conf`	Frontier-guided Graph Reordering. PPoPP Xinmiao Zhang, Cheng Liu, Shengwen Liang, Chenwei Xiong, Yu Zhang, Lei Zhang, Huawei Li, Xiaowei Li
2025	B	`conf`	Graphitron: A Domain Specific Language for FPGA-Based Graph Processing Accelerator Generation. LCTES Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Lei Zhang, Cheng Liu
2025	Misc	`conf`	HighTPI: A Hierarchical Graph Based Intelligent Method for Test Point Insertion. VTS Zhiteng Chao, Bin Sun, Hongqin Lyu, Ge Yu, Minjun Wang, Wenxing Li, Zizhen Liu, Jianan Mu, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li
2025	A*	`conf`	InstAttention: In-Storage Attention Offloading for Cost-Effective Long-Context LLM Inference. HPCA Xiurui Pan, Endian Li, Qiao Li, Shengwen Liang, Yizhou Shan, Ke Zhou, Yingwei Luo, Xiaolin Wang, Jie Zhang
2025	A*	`conf`	LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow. MICRO Kaiyan Chang, Wenlong Zhu, Shengwen Liang, Huawei Li, Ying Wang
2025	J	`jnl`	LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow. CoRR Kaiyan Chang, Wenlong Zhu, Shengwen Liang, Huawei Li, Ying Wang
2025	J	`jnl`	Large Processor Chip Model. CoRR Kaiyan Chang, Mingzhi Chen, Yunji Chen, Zhirong Chen, Dongrui Fan, Junfeng Gong, Nan Guo, Yinhe Han, Qinfen Hao, Shuo Hou, Xuanjing Huang, Pengwei Jin, Changxin Ke, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Li, Shengwen Liang, Cheng Liu, Hongwei Liu, Jiahua Liu, Junliang Lv, Jianan Mu, Jin Qin, Bin Sun, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wang, Chenggang Wu, Peiyang Wu, Teng Wu, Xiao Xiao, Mengyao Xie, Chenwei Xiong, Ruiyuan Xu, Mingyu Yan, Xiaochun Ye, Kuai Yu, Rui Zhang, Shuoming Zhang, Jiacheng Zhao
2025	A*	`conf`	MOSS: Multi-Modal Representation Learning on Sequential Circuits. DAC Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Jun Gao, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li
2025	A*	`conf`	NeuVSA: A Unified and Efficient Accelerator for Neural Vector Search. HPCA Ziming Yuan, Lei Dai, Wen Li, Jie Zhang, Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li, Jiafeng Guo, Peng Wang, Renhai Chen, Gong Zhang
2025	A*	`conf`	PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT. DAC Zhiteng Chao, Xindi Zhang, Xinyu Zhang, Jianan Mu, Zizhen Liu, Shengwen Liang, Shaowei Cai, Jing Ye, Xiaowei Li, Huawei Li
2025	J	`jnl`	QiMeng: Fully Automated Hardware and Software Design for Processor Chip. CoRR Rui Zhang, Yuanbo Wen, Shuyao Cheng, Di Huang, Shaohui Peng, Jiaming Guo, Pengwei Jin, Jiacheng Zhao, Tianrui Ma, Yaoyu Zhu, Yifan Hao, Yongwei Zhao, Shengwen Liang, Ying Wang, Xing Hu, Zidong Du, Huimin Cui, Ling Li, Qi Guo, Yunji Chen
2025	A	`conf`	Taijigraph: an Out-Of-Core Graph Processing System Enhanced with Computational Storage. IPDPS Xinmiao Zhang, Cheng Liu, Shengwen Liang, Hayden Kwok-Hay So, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2025	A*	`conf`	XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting. ISCA Li Peng, Wenbo Wu, Shushu Yi, Xianzhang Chen, Chenxi Wang, Shengwen Liang, Zhe Wang, Nong Xiao, Qiao Li, Mingzhe Zhang, Jie Zhang
2024	A	`conf`	AGC: A Unified Architecture for Accelerating K-Nearest Neighbor Graph Construction in Vector Search. ICCAD Lei Dai, Ziming Yuan, Wen Li, Shengwen Liang, Kaiwei Zou, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2024	B	`conf`	APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction. ASPDAC Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2024	A*	`conf`	Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption. DAC Jianan Mu, Husheng Han, Shangyi Shi, Jing Ye, Zizhen Liu, Shengwen Liang, Meng Li, Mingzhe Zhang, Song Bian, Xing Hu, Huawei Li, Xiaowei Li
2024	J	`jnl`	An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mingkai Chen, Cheng Liu, Shengwen Liang, Lei He, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024	A*	`conf`	Cambricon-LLM: A Chiplet-Based Hybrid Architecture for On-Device Inference of 70B LLM. MICRO Zhongkai Yu, Shengwen Liang, TianYun Ma, Yunke Cai, Ziyuan Nan, Di Huang, Xinkai Song, Yifan Hao, Jie Zhang, Tian Zhi, Yongwei Zhao, Zidong Du, Xing Hu, Qi Guo, Tianshi Chen
2024	J	`jnl`	Cambricon-LLM: A Chiplet-Based Hybrid Architecture for On-Device Inference of 70B LLM. CoRR Zhongkai Yu, Shengwen Liang, TianYun Ma, Yunke Cai, Ziyuan Nan, Di Huang, Xinkai Song, Yifan Hao, Jie Zhang, Tian Zhi, Yongwei Zhao, Zidong Du, Xing Hu, Qi Guo, Tianshi Chen
2024	A*	`conf`	Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. DAC Yibo Du, Ying Wang, Bing Li, Fuping Li, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han
2024	J	`jnl`	DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs. CoRR Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024	A*	`conf`	Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024	J	`jnl`	Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024	A*	`conf`	Flagger: Cooperative Acceleration for Large-Scale Cross-Silo Federated Learning Aggregation. ISCA Xiurui Pan, Yuda An, Shengwen Liang, Bo Mao, Mingzhe Zhang, Qiao Li, Myoungsoo Jung, Jie Zhang
2024	A	`conf`	GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction. DATE Yibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han
2024	J	`jnl`	Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation. CoRR Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Cheng Liu, Huawei Li, Xiaowei Li
2024	A	`conf`	HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. DATE Shengwen Liang, Ziming Yuan, Ying Wang, Dawen Xu, Huawei Li, Xiaowei Li
2024	J	`jnl`	InstInfer: In-Storage Attention Offloading for Cost-Effective Long-Context LLM Inference. CoRR Xiurui Pan, Endian Li, Qiao Li, Shengwen Liang, Yizhou Shan, Ke Zhou, Yingwei Luo, Xiaolin Wang, Jie Zhang
2024	A	`conf`	Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. ICCAD Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2024	J	`jnl`	Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. CoRR Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2024	A*	`conf`	SmartATPG: Learning-based Automatic Test Pattern Generation with Graph Convolutional Network and Reinforcement Learning. DAC Wenxing Li, Hongqin Lyu, Shengwen Liang, Tiancheng Wang, Huawei Li
2023	J	`jnl`	ChipGPT: How far are we from natural language hardware design. CoRR Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2023	A	`conf`	Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array. DATE Jianan Mu, Huajie Tan, Jiawen Wu, Haotian Lu, Chip-Hong Chang, Shuai Chen, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li
2023	—	`conf`	Intelligent Automatic Test Pattern Generation for Digital Circuits Based on Reinforcement Learning. ATS Wenxing Li, Hongqin Lyu, Shengwen Liang, Tiancheng Wang, Pengyu Tian, Huawei Li
2023	C	`conf`	PANG: A Pattern-Aware GCN Accelerator for Universal Graphs. ICCD Yibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han
2022	J	`jnl`	Cognitive SSD+: a deep learning engine for energy-efficient unstructured data retrieval. CCF Trans. High Perform. Comput. Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2022	A*	`conf`	VStore: in-storage graph based vector search accelerator. DAC Shengwen Liang, Ying Wang, Ziming Yuan, Cheng Liu, Huawei Li, Xiaowei Li
2021	J	`jnl`	EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE Trans. Computers Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li
2021	A*	`conf`	GCiM: A Near-Data Processing Accelerator for Graph Construction. DAC Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li
2021	—	`conf`	GLIST: Towards In-Storage Graph Learning. USENIX ATC Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li
2021	—	`conf`	The 2020 Low-Power Computer Vision Challenge. AICAS Xiao Hu, Ming-Ching Chang, Yuwei Chen, Rahul Sridhar, Zhenyu Hu, Yunhe Xue, Zhenyu Wu, Pengcheng Pi, Jiayi Shen, Jianchao Tan, Xiangru Lian, Ji Liu, Zhangyang Wang, Chia-Hsiang Liu, Yu-Shin Han, Yuan-Yao Sung, Yi Lee, Kai-Chiang Wu, Wei-Xiang Guo, Rick Lee, Shengwen Liang, Zerun Wang, Guiguang Ding, Gang Zhang, Teng Xi, Yubei Chen, Han Cai, Ligeng Zhu, Zhekai Zhang, Song Han, Seonghwan Jeong, YoungMin Kwon, Tianzhe Wang, Jeffery Pan
2020	A	`conf`	DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. ICCAD Shengwen Liang, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li
2019	A*	`conf`	A None-Sparse Inference Accelerator that Distills and Reuses the Computation Redundancy in CNNs. DAC Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li
2019	—	`conf`	Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval. USENIX ATC Shengwen Liang, Ying Wang, Youyou Lu, Zhe Yang, Huawei Li, Xiaowei Li
2019	B	`conf`	InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. FPL Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li