Shengqi Yu

12 papers A 3C 1Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2025 J jnl
HotReRAM: A Performance-Power-Thermal Simulation Framework for ReRAM-Based Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shounak Chakraborty, Thanasin Bunnam, Jedsada Arunruerk, Sukarn Agarwal, Shengqi Yu, Rishad A. Shafik, Magnus Själander
2025 J jnl
Single-step electron beam evaporation for integrated dual-metal gate and gate field-plate in GaN-on-Si MIS-HEMTs.
Microelectron. J.
Sheng Gao, Yanjun Wu, Xingyu Luo, Shengqi Yu, Qi Wang
2024 J jnl
Asymmetric trench SiC MOSFET with integrated channel accumulation diode for enhanced reverse conduction and switching characteristics.
Microelectron. J.
Sheng Gao, Xianfeng Zhang, Qi Wang, Shengqi Yu, Yang Zuo, Hongsheng Zhang, Yi Huang
2023 J jnl
Approximate digital-in analog-out multiplier with asymmetric nonvolatility and low energy consumption.
Integr.
Shengqi Yu, Fei Xia, Rishad A. Shafik, Domenico Balsamo, Alex Yakovlev
2023 A conf
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines.
ISLPED
Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik
2023 J jnl
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines.
CoRR
Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik
2022 — conf
Automated Mapping of Asynchronous Circuits on FPGA under Timing Constraints.
ISVLSI
Gang Mao, Alex Yakovlev, Fei Xia, Shengqi Yu, Rishad A. Shafik
2022 — conf
Automated Synthesis of Asynchronous Tsetlin Machines on FPGA.
ICECS 2022
Gang Mao, Alex Yakovlev, Fei Xia, Tian Lan, Shengqi Yu, Rishad A. Shafik
2022 C conf
Editable asynchronous control logic for SAR ADCs.
ISCAS
Tian Lan, Fei Xia, Gang Mao, Shengqi Yu, Rishad A. Shafik, Alex Yakovlev
2021 A conf
Optimized Multi-Memristor Model based Low Energy and Resilient Current-Mode Multiplier Design.
DATE
Shengqi Yu, Rishad A. Shafik, Thanasin Bunnam, Kaiyun Chen, Alex Yakovlev
2020 A conf
Current-Mode Carry-Free Multiplier Design using a Memristor-Transistor Crossbar Architecture.
DATE
Shengqi Yu, Ahmed Soltan, Rishad A. Shafik, Thanasin Bunnam, Fei Xia, Domenico Balsamo, Alex Yakovlev
2020 — conf
Self-Amplifying Current-Mode Multiplier Design using a Multi-Memristor Crossbar Cell Structure.
ICECS
Shengqi Yu, Rishad A. Shafik, Thanasin Bunnam, Kaiyun Chen, Alex Yakovlev