| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2012 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2011 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2010 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2010 | Misc | conf |
ITA
|
| 2010 | J | jnl |
CoRR
|
| 2010 | J | jnl |
CoRR
|
| 2010 | B | conf |
ISIT
|
| 2010 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2010 | J | jnl |
CoRR
|
| 2010 | B | conf |
ITW
|
| 2010 | J | jnl |
CoRR
|
| 2010 | B | conf |
ISIT
|
| 2009 | B | conf |
ISIT
|
| 2009 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2009 | J | jnl |
CoRR
|
| 2009 | J | jnl |
IEEE J. Sel. Areas Commun.
|
| 2009 | — | conf |
Allerton
|
| 2009 | J | jnl |
CoRR
|
| 2009 | B | conf |
ISIT
|
| 2008 | — | — |
|
| 2008 | J | jnl |
CoRR
|
| 2008 | J | jnl |
IEEE Trans. Inf. Theory
|
| 2008 | J | jnl |
CoRR
|
| 2008 | — | conf |
Allerton
|
| 2008 | J | jnl |
CoRR
|
| 2008 | B | conf |
ITW
|
| 2008 | J | jnl |
CoRR
|
| 2008 | J | jnl |
CoRR
|
| 2008 | J | jnl |
CoRR
|
| 2008 | B | conf |
ISIT
|
| 2008 | J | jnl |
CoRR
|
| 2007 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2007 | B | conf |
ISIT
|
| 2007 | J | jnl |
CoRR
|
| 2007 | J | jnl |
CoRR
|
| 2006 | B | conf |
ISIT
|
| 2006 | B | conf |
Construction of Memory Circuits Using Unreliable Components Based on Low-Density Parity-Check Codes.
GLOBECOM
|
| 2006 | — | conf |
ICC
|