Shaojie Xiang

19 papers A* 2A 6Misc 1Journal 10
YearRankTypeTitle / Venue / Authors
2026 A conf
SAS: Sparse Attention Synthesizer for Efficient Language Model Inference.
EuroSys
Yuan Zhou, Shaojie Xiang, Lingfan Yu, Zhenyu Song, Charith Mendis, Yida Wang
2025 A conf
ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines.
FPGA
Jinming Zhuang, Shaojie Xiang, Hongzheng Chen, Niansong Zhang, Zhuoping Yang, Tony Mao, Zhiru Zhang, Peipei Zhou
2025 J jnl
Understanding the Potential of FPGA-based Spatial Acceleration for Large Language Model Inference.
ACM Trans. Reconfigurable Technol. Syst.
Hongzheng Chen, Jiahao Zhang, Yixiao Du, Shaojie Xiang, Zichao Yue, Niansong Zhang, Yaohui Cai, Zhiru Zhang
2024 A conf
A Comprehensive Evaluation of FPGA-Based Spatial Acceleration of LLMs.
FPGA
Hongzheng Chen, Jiahao Zhang, Yixiao Du, Shaojie Xiang, Zichao Yue, Niansong Zhang, Yaohui Cai, Zhiru Zhang
2024 J jnl
Allo: A Programming Model for Composable Accelerator Design.
CoRR
Hongzheng Chen, Niansong Zhang, Shaojie Xiang, Zhichen Zeng, Mengjia Dai, Zhiru Zhang
2024 J jnl
Allo: A Programming Model for Composable Accelerator Design.
Proc. ACM Program. Lang.
Hongzheng Chen, Niansong Zhang, Shaojie Xiang, Zhichen Zeng, Mengjia Dai, Zhiru Zhang
2024 A conf
RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis.
ICCAD
Jason Lau, Yuanlong Xiao, Yutong Xie, Yuze Chi, Linghao Song, Shaojie Xiang, Michael Lo, Zhiru Zhang, Jason Cong, Licheng Guo
2024 J jnl
RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis.
CoRR
Jason Lau, Yuanlong Xiao, Yutong Xie, Yuze Chi, Linghao Song, Shaojie Xiang, Michael Lo, Zhiru Zhang, Jason Cong, Licheng Guo
2023 J jnl
Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inference.
CoRR
Hongzheng Chen, Jiahao Zhang, Yixiao Du, Shaojie Xiang, Zichao Yue, Niansong Zhang, Yaohui Cai, Zhiru Zhang
2022 A* conf
Accelerator design with decoupled hardware customizations: benefits and challenges: invited.
DAC
Debjit Pal, Yi-Hsiang Lai, Shaojie Xiang, Niansong Zhang, Hongzheng Chen, Jeremy Casas, Pasquale Cocchini, Zhenkun Yang, Jin Yang, Louis-Noël Pouchet, Zhiru Zhang
2022 A conf
HeteroFlow: An Accelerator Programming Model with Decoupled Data Placement for Software-Defined FPGAs.
FPGA
Shaojie Xiang, Yi-Hsiang Lai, Yuan Zhou, Hongzheng Chen, Niansong Zhang, Debjit Pal, Zhiru Zhang
2021 J jnl
Dagger: Accelerating RPCs in Cloud Microservices Through Tightly-Coupled Reconfigurable NICs.
CoRR
Nikita Lazarev, Shaojie Xiang, Neil Adit, Zhiru Zhang, Christina Delimitrou
2021 A* conf
Dagger: efficient and fast RPCs in cloud microservices with near-memory reconfigurable NICs.
ASPLOS
Nikita Lazarev, Shaojie Xiang, Neil Adit, Zhiru Zhang, Christina Delimitrou
2021 J jnl
Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects.
ACM Trans. Reconfigurable Technol. Syst.
Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, Zhiru Zhang
2020 J jnl
Dagger: Towards Efficient RPCs in Cloud Microservices With Near-Memory Reconfigurable NICs.
IEEE Comput. Archit. Lett.
Nikita Lazarev, Neil Adit, Shaojie Xiang, Zhiru Zhang, Christina Delimitrou
2020 J jnl
Dagger: Towards Efficient RPCs in Cloud Microservices with Near-Memory Reconfigurable NICs.
CoRR
Nikita Lazarev, Neil Adit, Shaojie Xiang, Zhiru Zhang, Christina Delimitrou
2019 Misc conf
LAMDA: Learning-Assisted Multi-stage Autotuning for FPGA Design Closure.
FCCM
Ecenur Ustun, Shaojie Xiang, Jinny Gui, Cunxi Yu, Zhiru Zhang
2019 J jnl
Study on Computational Experiments of C2C Tax Compliance based on Information of Cybermediaries.
Adv. Complex Syst.
Feng Xiong, Shaojie Xiang, Peng Jin
2018 A conf
DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only).
FPGA
Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang