Shao-Hui Shieh

11 papers C 1Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2011 J jnl
A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits.
J. Circuits Syst. Comput.
Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung
2011 — conf
Fabricating zinc oxide semiconductor device of flexible substrate by using the spin-coating method.
NEMS
Hsin-Chiang You, Shiang-Jun Zhang, Shao-Hui Shieh, Chiou-Kou Tung
2011 — conf
Fabrication of sol-gel-derived zinc oxide thin-film transistor.
NEMS
Shao-Hui Shieh, Hsin-Chiang You, Chyi-Yau Shao
2009 — conf
Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems.
IIH-MSP
Ching-Hwa Cheng, Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung
2009 — conf
High-Speed CMOS Chip Design for Manchester and Miller Encoder.
IIH-MSP
Yu-Cherng Hung, Min-Ming Kuo, Chiou-Kou Tung, Shao-Hui Shieh
2007 C conf
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System.
DDECS
Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang
2006 — conf
High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability.
APCCAS
Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung, Ming-Chien Tsai
2004 — conf
A novel radix-4 bit-level modular multiplier for fast RSA cryptosystem.
ISCAS (2)
Jin-Hua Hong, Bin-Yan Tsai, Liang-Te Lu, Shao-Hui Shieh
2003 J jnl
Asymmetric High-Radix Signed-Digit Number Systems for Carry-Free Addition.
J. Inf. Sci. Eng.
Shao-Hui Shieh, Cheng-Wen Wu
2000 J jnl
A fast signature computation algorithm for LFSR and MISR.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu
1996 — conf
A MISR Computation Algorithm for Fast Signature Simulation.
Asian Test Symposium
Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu