Shantanu Sarangi

14 papers A 4Misc 8Journal 2
YearRankTypeTitle / Venue / Authors
2024 A conf
A Scalable & Cost Efficient Next-Gen Scan Architecture: Streaming Scan Test via NVIDIA MATHS.
ITC
Kunal Jain Mangilal, Mahmut Yilmaz, Vishal Agarwal, Shantanu Sarangi, Kaushik Narayanun
2023 J jnl
NVIDIA MATHS: Mechanism to Access Test-Data Over High-Speed Links.
IEEE Des. Test
Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Kaushik Narayanun, Shantanu Sarangi, Francisco Da Silva, Joe Sarmiento
2022 Misc conf
NVIDIA MATHS: Mechanism to Access Test-Data over High-Speed Links.
VTS
Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Kaushik Narayanun, Shantanu Sarangi, Francisco Da Silva, Joe Sarmiento, Smbat Tonoyan, Ashwin Chintaluri, Animesh Khare, Milind Sonawane, Ashish Kumar, Anitha Kalva, Alex Hsu, Jayesh Pandey
2022 Misc conf
On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST).
VTS
Seyed Nima Mozaffari, Bonita Bhaskaran, Shantanu Sarangi, Suhas M. Satheesh, Kuo Lin Fu, Nithin Valentine, P. Manikandan, Mahmut Yilmaz
2020 J jnl
A Novel Graph-Coloring-Based Solution for Low-Power Scan Shift.
IEEE Des. Test
Saurabh Gupta, Bonita Bhaskaran, Shantanu Sarangi, Ayub Abdollahian, Jennifer Dworak
2019 Misc conf
A Novel Graph Coloring Based Solution for Low-Power Scan Shift.
VTS
Saurabh Gupta, Bonita Bhaskaran, Shantanu Sarangi, Ayub Abdollahian, Jennifer Dworak
2019 A conf
An Efficient Supervised Learning Method to Predict Power Supply Noise During At-speed Test.
ITC
Seyed Nima Mozaffari, Bonita Bhaskaran, Kaushik Narayanun, Ayub Abdollahian, Vinod Pagalone, Shantanu Sarangi, Jonathon E. Colburn
2019 Misc conf
Hybrid Performance Modeling for Optimization of In-System-Structural-Test (ISST) Latency.
VTS
Milind Sonawane, Venkat Abilash Reddy Nerallapally, Alex Hsu, Shantanu Sarangi
2019 Misc conf
Special Session: In-System-Test (IST) Architecture for NVIDIA Drive-AGX Platforms.
VTS
Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Shashank Bajpai, Venkat Abilash Reddy Nerallapally, Jayesh Pandey, Sam Jiang
2017 Misc conf
At-speed capture global noise reduction & low-power memory test architecture.
VTS
Bonita Bhaskaran, Sailendra Chadalavada, Shantanu Sarangi, Nithin Valentine, Venkat Abilash Reddy Nerallapally, Ayub Abdollahian
2016 A conf
Advanced test methodology for complex SoCs.
ITC
Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Ayub Abdollahian
2016 Misc conf
Dynamic docking architecture for concurrent testing and peak power reduction.
VTS
Milind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha
2016 Misc conf
Flexible scan interface architecture for complex SoCs.
VTS
Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn
2011 A conf
A clock-gating based capture power droop reduction methodology for at-speed scan testing.
DATE
Bo Yang, Amit Sanghani, Shantanu Sarangi, Chunsheng Liu