Shailendra Jain

31 papers Misc 4Journal 17Unranked 9

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Development of single linear induction motor for high-speed transit system. Soft Comput. V. Shirish Murty, Shailendra Jain, Amit Ojha
2022	J	`jnl`	Analyzing modeled configuration using finite element analysis for performance prediction of LSRM. Neural Comput. Appl. V. Shirish Murty, Shailendra Jain, Amit Ojha
2021	J	`jnl`	Advancements in Converter Topology and control Strategies for switched Reluctance motors: Recent Contributions. Mechatron. Syst. Control. V. Shirish Murty, Shailendra Jain, Amit Ojha
2021	J	`jnl`	Suitability of linear switched Reluctance motor for Advanced Electric Traction System. Mechatron. Syst. Control. V. Shirish Murty, Shailendra Jain, Amit Ojha
2019	J	`jnl`	Five-Level Cascaded H-Bridge MLC-Based Shunt Active Power Filter for Active Harmonics Mitigation in Distributed Network. J. Circuits Syst. Comput. Jitendra Tandekar, Amit Ojha, Shailendra Jain
2016	J	`jnl`	A Review of Some Recently Proposed Topologies for Multilevel DC-AC Conversion. J. Circuits Syst. Comput. Rekha Agrawal, Shailendra Jain
2016	J	`jnl`	Suitability of Reduced Part Count Multilevel Inverter Topologies for Grid Interfacing. J. Circuits Syst. Comput. Rekha Agrawal, Shailendra Jain
2016	—	`conf`	Unity power factor controller for neutral point clamped active front end converter with DC voltage balancing. ICIT Pradyumn Chaturvedi, Amit Ojha, Shailendra Jain, Arvind Mittal
2016	—	`conf`	Wavelet based real-time power quality monitoring. CCECE Sameer Singh, Bhavna Jain, Shailendra Jain
2015	J	`jnl`	Soft Computing Techniques for Static Series Voltage Regulator of Self Excited Induction Generator. J. Circuits Syst. Comput. Sachin Tiwari, Sushma Gupta, Shailendra Jain, Bhim Singh
2014	J	`jnl`	A Novel Multilevel Inverter Based on Switched DC Sources. IEEE Trans. Ind. Electron. Krishna Kumar Gupta, Shailendra Jain
2014	—	`conf`	A solar-powered 280mV-to-1.2V wide-operating-range IA-32 processor. ICICDT Sriram R. Vangal, Shailendra Jain, Vivek De
2014	J	`jnl`	Carrier-Based Neutral Point Potential Regulator With Reduced Switching Losses for Three-Level Diode-Clamped Inverter. IEEE Trans. Ind. Electron. Pradyumn Chaturvedi, Shailendra Jain, Pramod Agarwal
2013	—	`conf`	Architecture and configuration of electrified vehicles: A review. ISIE Lalit Kumar, Krishna Kumar Gupta, Shailendra Jain
2013	J	`jnl`	IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS. IEEE Micro Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Sriram R. Vangal
2013	—	`conf`	Power electronic interface for vehicular electrification. ISIE Lalit Kumar, Krishna Kumar Gupta, Shailendra Jain
2013	Misc	`conf`	Prospects of Near-Threshold Voltage Design for Green Computing. VLSI Design Surhud Khare, Shailendra Jain
2012	—	`conf`	A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS. ISSCC Shailendra Jain, Surhud Khare, Satish Yada, V. Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M. Srinivasan, Arun Kumar, Shasi Kumar, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram R. Vangal, Saurabh Dighe, Gregory Ruhl, Paolo A. Aseron, Howard Wilson, Nitin Borkar, Vivek De, Shekhar Borkar
2012	Misc	`conf`	A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip. VLSI Design Praveen Salihundam, Mohammed Asadullah Khan, Shailendra Jain, Yatin Vasant Hoskote, Satish Yada, Shasi Kumar, Vasantha Erraguntla, Sriram R. Vangal, Nitin Borkar
2012	—	`conf`	An IA-32 processor with a wide voltage operating range in 32nm CMOS. Hot Chips Symposium Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Satish Yada, V. Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M. Srinivasan, Arun Kumar, Shasi Kumar, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram R. Vangal, Paolo A. Aseron, Howard Wilson, Nitin Borkar
2011	J	`jnl`	A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS. IEEE J. Solid State Circuits Praveen Salihundam, Shailendra Jain, Tiju Jacob, Shasi Kumar, Vasantha Erraguntla, Yatin Vasant Hoskote, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar
2011	J	`jnl`	A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling. IEEE J. Solid State Circuits Jason Howard, Saurabh Dighe, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar, Shailendra Jain, Vasantha Erraguntla, Michael Konow, Michael Riepen, Matthias Gries, Guido Droege, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek K. De, Rob F. Van der Wijngaart
2010	—	`conf`	A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC Jason Howard, Saurabh Dighe, Yatin Vasant Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson
2010	Misc	`conf`	A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm. VLSI Design Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik
2010	J	`jnl`	HP Transforms Product Portfolio Management with Operations Research. Interfaces Julie Ward, Bin Zhang, Shailendra Jain, Chris Fry, Thomas Olavson, Holger Mishal, Jason Amaral, Dirk Beyer, Ann Brecht, Brian Cargille, Russ Chadinha, Kathy Chou, Gavin DeNyse, Qi Feng, Cookie Padovani, Sesh Raj, Kurt Sunderbruch, Robert Endre Tarjan, Krishna Venkatraman, Joseph Woods, Jing Zhou
2008	J	`jnl`	An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE J. Solid State Circuits Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Vasantha Erraguntla, Clark Roberts, Yatin Vasant Hoskote, Nitin Borkar, Shekhar Borkar
2007	—	`conf`	An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. ISSCC Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Priya Iyer, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Sriram Venkataraman, Yatin Hoskote, Nitin Borkar
2006	Misc	`conf`	Testing High-Speed IO Links Using On-Die Circuitry. VLSI Design Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard
2005	J	`jnl`	A Dedicated Microcontroller based Fuzzy Controlled Shunt Active Power Filter. Intell. Autom. Soft Comput. Shailendra Jain, Pramod Agarwal, H. O. Gupta
2003	—	`book`	Broadband infrastructure - the ultimate guide to building and delivering OSS / BSS from BusinessEdge Solutions (2. ed.). Shailendra Jain, Mark Hayward, Sharad Kumar
1996	J	`jnl`	Implementing Setup Optimization on the Shop Floor. Oper. Res. Shailendra Jain, M. Eric Johnson, Fereydoon Safai