Sergio Ruocco

12 papers A 1C 5Journal 5Unranked 1
YearRankTypeTitle / Venue / Authors
2018 J jnl
Dynamic Reference Voltage Sensing Scheme for Read Margin Improvement in STT-MRAMs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2018 C conf
Novel Time-Based Sensing Scheme for STT-MRAMs.
ISCAS
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2018 J jnl
Time-Based Sensing for Reference-Less and Robust Read in STT-MRAM Memories.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2016 C conf
Boosted sensing for enhanced read stability in STT-MRAMs.
ISCAS
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2016 J jnl
Novel Boosted-Voltage Sensing Scheme for Variation-Resilient STT-MRAM Read.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2016 C conf
STT-MRAM write energy minimization via area optimization under dynamic voltage Scaling.
ISCAS
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2016 J jnl
Voltage Scaled STT-MRAMs Towards Minimum-Energy Write Access.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2015 — conf
Efficient Persistence of Financial Transactions in NVM-based Cloud Data Centers.
ICCCRI
Sergio Ruocco, Duy-Khanh Le
2015 C conf
Modeling the impact of dynamic voltage scaling on 1T-1J STT-RAM write energy and performance.
ISCAS
Kien Trinh Quang, Sergio Ruocco, Massimo Alioto
2008 J jnl
A Real-Time Programmer's Tour of General-Purpose L4 Microkernels.
EURASIP J. Embed. Syst.
Sergio Ruocco
2006 A conf
User-Level Fine-Grained Adaptive Real-Time Scheduling via Temporal Reflection.
RTSS
Sergio Ruocco
2004 C conf
Time Sensitive Architectures: A Reflective Approach.
ISORC
Daniela Micucci, Sergio Ruocco, Francesco Tisato, Andrea Trentini