Sergey Y. Shumarayev

17 papers A 3B 1Journal 2Unranked 11
YearRankTypeTitle / Venue / Authors
2024 J jnl
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.
IEEE J. Solid State Circuits
Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang
2024 — conf
Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity.
CICC
Yuyang Wang, Songli Wang, Robert Parsons, Asher Novick, Vignesh Gopal, Kaylx Jang, Anthony Rizzo, Chia-Pin Chiu, Kaveh Hosseini, Tim Tri Hoang, Sergey Y. Shumarayev, Keren Bergman
2023 — conf
Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm
VLSI Technology and Circuits
Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang
2022 — conf
5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O.
VLSI Technology and Circuits
Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O'Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Christopher Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade
2022 — conf
Heterogenous Integration Enables FPGA Based Hardware Acceleration for RF Applications.
HCS
Sergey Y. Shumarayev, Allen Chan, Tim Hoang, Robert Keller
2021 — conf
8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.
OFC
Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Chia-Pin Chiu, Arnab Sarkar, Asako Toda, Yanjing Ke, Allen Chan, Daniel Jeong, Mason Zhang, Sangeeta Raman, Thungoc Tran, Kumar Abhishek Singh, Pavan Bhargava, Chong Zhang, Haiwei Lu, Ravi Mahajan, Xiaoqian Li, Nitin Deshpande, Conor O'Keeffe, Tim Tri Hoang, Uma Krishnamoorthy, Chen Sun, Roy Meade, Vladimir Stojanovic, Mark Wade
2020 J jnl
TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O.
IEEE Micro
Mark T. Wade, Roy Meade, Chandru Ramamurthy, Michael Rust, Forrest Sedgwick, Vladimir Stojanovic, Derek Van Orden, Chong Zhang, Chen Sun, Sergey Y. Shumarayev, Conor O'Keeffe, Erik Anderson, Tim T. Hoang, David Kehlet, Ravi V. Mahajan, Matthew T. Guzy, Allen Chan, Tina Tran, Shahab Ardalan, Pavan Bhargava, Sidney Buchbinder, Michael L. Davenport, John Michael Fini, Haiwei Lu, Chen Li
2018 A conf
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).
FPGA
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu
2018 B conf
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.
FPL
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev
2015 — conf
Arria™ 10 device architecture.
CICC
Jeffrey Tyhach, Mike Hutton, Sean Atsatt, Arifur Rahman, Brad Vest, David M. Lewis, Martin Langhammer, Sergey Y. Shumarayev, Tim Hoang, Allen Chan, Dong-Myung Choi, Dan Oh, Hae-Chang Lee, Jack Chui, Ket Chiew Sia, Edwin Kok, Wei-Yee Koay, Boon-Jin Ang
2013 — conf
A 3.1mW phase-tunable quadrature-generation method for CEI 28G short-reach CDR in 28nm CMOS.
ISSCC
Kanupriya Bhardwaj, Sriram Narayan, Sergey Y. Shumarayev, Thomas H. Lee
2012 A conf
On-die instrumentation to solve challenges for 28nm, 28Gbps timing variability and stressing.
ITC
Weichi Ding, Mingde Pan, Wilson Wong, Daniel Chow, Mike Peng Li, Sergey Y. Shumarayev
2010 — conf
Introducing 28-nm stratix VFPGAs: Built for bandwidth.
Hot Chips Symposium
Dan Mansur, Sergey Y. Shumarayev
2009 — conf
Emerging standards at ∼10 Gbps for wireline communications and associated integrated circuit design and validation.
CICC
Mike Peng Li, Sergey Y. Shumarayev
2007 — conf
Receiver Offset Cancellation in 90-nm PLD Integrated SERDES.
CICC
Simar Maangat, Toan Nguyen, Wilson Wong, Sergey Y. Shumarayev, Tina Tran, Tim Hoang, Richard Cliff
2005 — conf
A signal integrity-based link performance simulation platform.
CICC
Yuming Tao, William Bereza, Rakesh H. Patel, Sergey Y. Shumarayev, Tad A. Kwasniewski
2002 A conf
Interconnect enhancements for a high-speed PLD architecture.
FPGA
Michael D. Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh H. Patel, Bruce Pedersen, Jay Schleicher, Sergey Y. Shumarayev