Sergey Ostanin

21 papers C 2Journal 1Unranked 18

Year	Rank	Type	Title / Venue / Authors
2018	—	`conf`	Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults. EWDTS Sergey Ostanin, Valentina Andreeva, Natalia Butorina, D. Tretyakov
2018	—	`conf`	Trojan circuits masking and debugging of combinational circuits with LUT insertion. AQTR Anzhela Yu. Matrosova, Sergey Ostanin
2017	—	`conf`	Detection and masking of Trojan Circuits in sequential logic. EWDTS Anzhela Yu. Matrosova, Eugeniy Mitrofanov, Sergey Ostanin, Ekaterina Nikolaeva
2017	—	`conf`	Logic circuit design with gates, LUTs and MUXs oriented to mask faults. EWDTS Anzhela Yu. Matrosova, Sergey Ostanin, D. Tretyakov, Natalia Butorina
2017	—	`conf`	Self-checking synchronous FSM network design for path delay faults. EWDTS Sergey Ostanin
2016	C	`conf`	A fault-tolerant sequential circuit design for SAFs and PDFs soft errors. IOLTS Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva
2016	—	`conf`	A fault-tolerant sequential circuit design for soft errors based on fault-secure circuit. EWDTS Sergey Ostanin, Anzhela Yu. Matrosova, Natalia Butorina, V. Lavrov
2016	—	`conf`	Patching circuit design based on reserved CLBs. AQTR Anjela Yu. Matrosova, Sergey Ostanin, Valentina Andreeva
2015	—	`conf`	A fault-tolerant combinational circuit design. EWDTS Sergey Ostanin, Irina Kirienko, V. Lavrov
2015	—	`conf`	Fault-tolerant high performance scheme design. EWDTS Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva
2015	C	`conf`	Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB Implementation of Incompletely Specified Boolean Function of the Corresponding Sub-Circuit. DDECS Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko
2014	—	`conf`	Partially programmable circuit design. EWDTS Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Virendra Singh
2013	—	`conf`	Observability calculation of state variable oriented to robust PDFs and LOC or LOS techniques. EWDTS Anzhela Yu. Matrosova, Sergey Ostanin, Alexey Melnikov, Virendra Singh
2013	—	`conf`	Testable combinational circuit design based on free ZDD-implementation of irredundant SOPof Boolean function. EWDTS Sergey Ostanin
2011	—	`conf`	Implementation by the special formula of an arbitrary subset of code words of (m, n)-code for designing a self-testing checker. EWDTS Natalia Butorina, Sergey Ostanin
2010	—	`conf`	Testable combinational circuit design based on ZDD-implementation of ISOP Boolean function. EWDTS Sergey Ostanin, R. Muchamedov
2002	—	`conf`	Self-checking sequential circuits with self-healing ability. ACM Great Lakes Symposium on VLSI Ilya Levin, Vladimir Ostrovsky, Sergey Ostanin, Mark G. Karpovsky
2002	—	`conf`	Sequential Circuits Applicable for Detecting Different Types of Faults. IOLTW Ilya Levin, Vladimir Sinelnikov, Mark G. Karpovsky, Sergey Ostanin
2001	—	`conf`	Survivable Self-Checking Sequential Circuits. DFT Anzhela Yu. Matrosova, Sergey Ostanin, Ilya Levin
2000	—	`conf`	Self-Checking FSM Design with Observing only FSM Outputs. IOLTW Anzhela Yu. Matrosova, Sergey Ostanin
2000	J	`jnl`	Self-checking Synchronous FSM Network Design with Low Overhead. VLSI Design Anzhela Yu. Matrosova, Ilya Levin, Sergey Ostanin