Serge Vernalde

46 papers A* 5A 7B 8C 3Misc 3Journal 5Unranked 15

Year	Rank	Type	Title / Venue / Authors
2004	J	`jnl`	A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocess. Microsystems Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
2004	A	`conf`	Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. DATE Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins
2004	B	`ed.`	Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings FPL Jürgen Becker, Marco Platzner, Serge Vernalde
2004	—	`conf`	Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays. FPT Steven J. E. Wilton, Noha Kafafi, Bingfeng Mei, Serge Vernalde
2004	B	`conf`	Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. FPL T. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert
2004	A*	`conf`	Operating-system controlled network on chip. DAC Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde
2004	J	`jnl`	Run-time support for heterogeneous multitasking on reconfigurable SoCs. Integr. Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	A	`conf`	A framework for mapping scalable networked applications on run-time reconfigurable platforms. ICME Nam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignolet, Serge Vernalde, Geert Deconinck, Rudy Lauwereins
2003	B	`conf`	ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. FPL Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
2003	Misc	`conf`	Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
2003	A	`conf`	Designing an Operating System for a Heterogeneous Reconfigurable So. IPDPS Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	A	`conf`	Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. DATE Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
2003	—	`conf`	Flexible system model and architectural exploration for HIPERLAN 2 DLC wireless LAN protocol. ICC Vivek Nema, Bart van Poucke, Miguel Glassee, Serge Vernalde
2003	—	`conf`	Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems. Engineering of Reconfigurable Systems and Algorithms Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	—	`conf`	Highly scalable network on chip for reconfigurable systems. SoC T. Andrei Bartic, Jean-Yves Mignolet, Vincent Nollet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	A	`conf`	Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. DATE Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	B	`conf`	Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. FPL Théodore Marescaux, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2003	C	`conf`	Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. SCOPES Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor
2003	B	`conf`	Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor
2003	—	`conf`	Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTIMedia Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
2002	B	`conf`	Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. FPL Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man
2002	J	`jnl`	Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects. J. Supercomput. Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Rudy Lauwereins, Hugo De Man
2002	—	`conf`	DRESC: a retargetable compiler for coarse-grained reconfigurable architectures. FPT Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
2002	B	`conf`	Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs. FPL Théodore Marescaux, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
2002	A	`conf`	Techniques to Evolve a C++ Based System Design Language. DATE Robert Pasko, Serge Vernalde, Patrick Schaumont
2001	Misc	`conf`	A SW/HW Interface API for Java/FPGA Co-Designed Applets. FCCM Yajun Ha, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man
2001	B	`conf`	Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware. FPL Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man
2001	—	`conf`	Hardware/software partitioning of embedded system in OCAPI-xl. CODES Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
2001	—	`conf`	Platform design approach for re-configurable network appliances. CICC Radim Cmar, Robert Pasko, Jean-Yves Mignolet, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde
2001	—	`conf`	Virtual Java/FPGA interface for networked reconfiguration. ASP-DAC Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man
2000	C	`conf`	A Hardware Virtual Machine for the Networked Reconfiguration. IEEE International Workshop on Rapid System Prototyping Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man
2000	Misc	`conf`	Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects. PDPTA Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Hugo De Man
2000	—	`conf`	Functional verification of an embedded network component by co-simulation with a real network. HLDVT Robert Pasko, Radim Cmar, Patrick Schaumont, Serge Vernalde
2000	—	`conf`	High-performance flexible all-digital quadrature up and down converter chip. CICC Robert Pasko, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Daniela Duracková
1999	A*	`conf`	A 10 Mbit/s Upstream Cable Modem with Automatic equalization. DAC Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels
1999	A	`conf`	A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
1999	J	`jnl`	A new algorithm for elimination of common subexpressions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Robert Pasko, Patrick Schaumont, Veerle Derudder, Serge Vernalde, Daniela Duracková
1999	A*	`conf`	Hardware Reuse at the Behavioral Level. DAC Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens
1998	A*	`conf`	A Programming Environment for the Design of Complex High Speed ASICs. DAC Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1998	C	`conf`	A Technique for Combined Virtual Prototyping and Hardware Design. International Workshop on Rapid System Prototyping Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens
1998	J	`jnl`	Low Power Digital Frequency Conversion Architectures. J. VLSI Signal Process. Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
1997	—	`conf`	Highly scalable parallel parametrizable architecture of the motion estimator. ED&TC Radim Cmar, Serge Vernalde
1997	—	`conf`	Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1996	—	`conf`	A Hilbert fractal codec for region oriented compression of color images. ICECS Jan Bormans, Serge Vernalde, Jan Cornelis, Ivo Bolsens, Hugo De Man
1996	A*	`conf`	Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens
1994	—	`conf`	ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. EURO-DAC Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk