| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2011 | Misc | conf |
VTS
|
| 2010 | J | jnl |
IEEE Trans. Computers
|
| 2010 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2009 | A | conf |
DSN
|
| 2009 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2009 | A | conf |
DATE
|
| 2008 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2008 | — | conf |
ATS
|
| 2008 | B | conf |
ETS
|
| 2008 | J | jnl |
IEEE Trans. Computers
|
| 2007 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2007 | — | conf |
ATS
|
| 2007 | — | conf |
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture.
ASP-DAC
|
| 2007 | A | conf |
ICCAD
|
| 2007 | A | conf |
ITC
|
| 2007 | A | conf |
DATE
|
| 2007 | A | conf |
DATE
|
| 2007 | Misc | conf |
VLSI Design
|
| 2006 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2006 | A | conf |
DATE
|
| 2006 | A | conf |
DATE
|
| 2006 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2006 | Misc | conf |
VLSI Design
|
| 2006 | A* | conf |
DAC
|
| 2006 | — | conf |
ATS
|
| 2005 | C | conf |
ICCD
|
| 2005 | Misc | conf |
VLSI Design
|
| 2005 | A | conf |
ICCAD
|
| 2005 | A | conf |
ITC
|
| 2004 | A | conf |
DATE
|
| 2004 | — | conf |
ASP-DAC
|
| 2003 | A | conf |
ITC
|
| 2002 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2002 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2002 | A | conf |
ITC
|
| 1999 | A | conf |
ITC
|
| 1998 | J | jnl |
IEEE Trans. Computers
|
| 1997 | A* | conf |
DAC
|
| 1997 | A | conf |
ITC
|
| 1994 | A | conf |
ITC
|