Seong Joong Kim

22 papers C 2Misc 1Journal 8Unranked 10

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	A 4 IEEE Trans. Circuits Syst. II Express Briefs Kent Edrian Lozada, Il-Hoon Jang, Gyeom-Je Bae, Dong-Hun Lee, Ye-Dam Kim, Hankyu Lee, Seong Joong Kim, Seung-Tak Ryu
2019	—	`conf`	Micro Bio Processor: a 0.144cc 70uW closed loop platform for body implant electroceutical systems. BioCAS Sang Joon Kim, Joonseong Kang, Wonseok Lee, Jonghan Kim, Junyeub Suh, ChiSung Bae, Hyungwoo Lee, Jongpal Kim, Seungchul Jung, Seok-Ju Yun, Young-Jun Hong, Hankyu Lee, Jaechun Lee, Seong Joong Kim
2018	J	`jnl`	A 10-MHz 2-800-mA 0.5-1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes. IEEE J. Solid State Circuits Seong Joong Kim, Woo-Seok Choi, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu
2018	Misc	`conf`	Time-Based PWM Controller for Fully Integrated High Speed Switching DC-DC Converters - An Alternative to Conventional Analog and Digital Controllers. VLSID Qadeer Ahmad Khan, Seong Joong Kim, Pavan Kumar Hanumolu
2017	J	`jnl`	A 0.0021 mm IEEE J. Solid State Circuits Junheng Zhu, Romesh Kumar Nandwana, Guanghua Shu, Ahmed Elkholy, Seong Joong Kim, Pavan Kumar Hanumolu
2017	—	`conf`	A 10MHz 2mA-800mA 0.5V-1.5V 90% peak efficiency time-based buck converter with seamless transition between PWM/PFM modes. CICC Seong Joong Kim, Woo-Seok Choi, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu
2017	J	`jnl`	A 2.4-GHz Ternary Sequence Spread Spectrum OOK Transceiver for Reliable and Ultra-Low Power Sensor Network Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Seong Joong Kim, Chang Soon Park, Sang-Gug Lee
2016	—	`conf`	19.8 A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS. ISSCC Junheng Zhu, Romesh Kumar Nandwana, Guanghua Shu, Ahmed Elkholy, Seong Joong Kim, Pavan Kumar Hanumolu
2016	—	`conf`	23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS. ISSCC Guanghua Shu, Woo-Seok Choi, Saurabh Saxena, Seong Joong Kim, Mrunmay Talegaonkar, Romesh Kumar Nandwana, Ahmed Elkholy, Da Wei, Timir Nandi, Pavan Kumar Hanumolu
2016	—	`conf`	A 2.4GHz ternary sequence spread spectrum OOK transceiver with harmonic spur suppression and dual-mode detection architecture for ULP wearable devices. VLSI Circuits Seong Joong Kim, Chang Soon Park, Youngkyu Kim, Seok-Ju Yun, Young-Jun Hong, Sang-Gug Lee
2016	—	`—`	Time-based control techniques for integrated DC-DC conversion Seong Joong Kim
2015	—	`conf`	12.2 A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm ISSCC Seong Joong Kim, Romesh Kumar Nandwana, Qadeer Ahmad Khan, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu
2015	—	`conf`	A 2.8mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS. VLSIC Saurabh Saxena, Guanghua Shu, Romesh Kumar Nandwana, Mrunmay Talegaonkar, Ahmed Elkholy, Tejasvi Anand, Seong Joong Kim, Woo-Seok Choi, Pavan Kumar Hanumolu
2015	J	`jnl`	A 4-Phase 30-70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator. IEEE J. Solid State Circuits Seong Joong Kim, Romesh Kumar Nandwana, Qadeer Khan, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu
2015	J	`jnl`	A Calibration-Free Fractional-N Ring PLL Using Hybrid Phase/Current-Mode Phase Interpolation Method. IEEE J. Solid State Circuits Romesh Kumar Nandwana, Tejasvi Anand, Saurabh Saxena, Seong Joong Kim, Mrunmay Talegaonkar, Ahmed Elkholy, Woo-Seok Choi, Amr Elshazly, Pavan Kumar Hanumolu
2015	J	`jnl`	A Highly Digital VCO-Based ADC Architecture for Current Sensing Applications. IEEE J. Solid State Circuits Praveen Prabha, Seong Joong Kim, Karthikeyan Reddy, Sachin Rao, Nathanael Griesert, Arun Rao, Greg Winter, Pavan Kumar Hanumolu
2015	J	`jnl`	High Frequency Buck Converter Design Using Time-Based Control Techniques. IEEE J. Solid State Circuits Seong Joong Kim, Qadeer Khan, Mrunmay Talegaonkar, Amr Elshazly, Arun Rao, Nathanael Griesert, Greg Winter, William McIntyre, Pavan Kumar Hanumolu
2014	—	`conf`	A 10-25MHz, 600mA buck converter using time-based PID compensator with 2µA/MHz quiescent current, 94% peak efficiency, and 1MHz BW. VLSIC Qadeer Ahmad Khan, Seong Joong Kim, Mrunmay Talegaonkar, Amr Elshazly, Arun Rao, Nathanael Griesert, Greg Winter, William McIntyre, Pavan Kumar Hanumolu
2014	—	`conf`	A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement. VLSIC Romesh Kumar Nandwana, Tejasvi Anand, Saurabh Saxena, Seong Joong Kim, Mrunmay Talegaonkar, Ahmed Elkholy, Woo-Seok Choi, Amr Elshazly, Pavan Kumar Hanumolu
2014	—	`conf`	A VCO-based current-to-digital converter for sensor applications. CICC Praveen Prabha, Seong Joong Kim, Karthikeyan Reddy, Sachin Rao, Nathanael Griesert, Arun Rao, Greg Winter, Pavan Kumar Hanumolu
2012	C	`conf`	Challenges and directions of ultra low energy wireless sensor nodes for biosignal monitoring. ISCAS Seong Joong Kim, Bumman Kim, Sangwook Nam, Dejan Markovic, Sang-Gug Lee, Jaesup Lee
2012	C	`conf`	Ultra-low power sensor platform with wireless charging system. ISCAS Young-Jun Hong, Joonseong Kang, Seong Joong Kim, Sang Joon Kim, Ui-Kun Kwon