Seiya Shibata

16 papers B 1C 1Misc 2Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2025 — conf
Accelerating Multi-Modal Radio Frequency Fingerprinting by Efficient Early Fusion.
VTC2025-Spring
Kazutoshi Hirose, Seiya Shibata, Taichi Ohtsuji, Takashi Takenaka
2024 B conf
PREDEA: Predicted-RoI based Resource-Efficient Object Detection with Aggregation.
SMARTCOMP
Yoshikazu Watanabe, Seiya Shibata, Takashi Takenaka
2024 Misc conf
Work-in-Progress: Temporal RegionDrop - Frame Difference Sparsity for Efficient Video Inference.
CASES
Youki Sada, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka
2022 — conf
RegionDrop: Fast Human Pose Estimation Using Annotation-Aware Spatial Sparsity.
ICANN (4)
Youki Sada, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka
2019 J jnl
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA.
IPSJ Trans. Syst. LSI Des. Methodol.
Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi
2019 — conf
Real-Time Detection and Tracking Using Hybrid DNNs and Space-Aware Color Feature: From Algorithm to System.
ACPR (1)
Liang Feng, Hiroaki Igarashi, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka, Wei Zhang
2014 Misc conf
Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs.
FCCM
Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2013 — conf
Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration.
IESS
Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2012 J jnl
A Fast Performance Estimation Framework for System-Level Design Space Exploration.
IPSJ Trans. Syst. LSI Des. Methodol.
Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2011 — conf
Fast design space exploration for mixed hardware-software embedded systems.
ISOCC
Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010 J jnl
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010 C conf
Automatic communication synthesis with hardware sharing for design space exploration.
ISCAS
Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010 J jnl
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation.
Inf. Media Technol.
Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010 J jnl
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation.
IPSJ Trans. Syst. LSI Des. Methodol.
Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2008 J jnl
Embedded System Covalidation with RTOS Model and FPGA.
Inf. Media Technol.
Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada
2008 J jnl
Embedded System Covalidation with RTOS Model and FPGA.
IPSJ Trans. Syst. LSI Des. Methodol.
Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada