Seda Ogrenci Memik

101 papers A* 10A 24B 7C 12Misc 4Journal 30Unranked 14

Year	Rank	Type	Title / Venue / Authors
2023	C	`conf`	A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors. ISCAS Adam Quinn, Manuel Blanco Valentin, Thomas Zimmerman, Davide Braga, Seda Ogrenci Memik, Farah Fahim
2022	J	`jnl`	Applications and Techniques for Fast Machine Learning in Science. Frontiers Big Data Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Dongning Guo, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Shen Wang, Thomas K. Warburton
2021	J	`jnl`	Applications and Techniques for Fast Machine Learning in Science. CoRR Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng
2021	J	`jnl`	hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices. CoRR Farah Fahim, Benjamin Hawks, Christian Herwig, James Hirschauer, Sergo Jindariani, Nhan Tran, Luca P. Carloni, Giuseppe Di Guglielmo, Philip C. Harris, Jeffrey D. Krupa, Dylan S. Rankin, Manuel Blanco Valentin, Josiah D. Hester, Yingyi Luo, John Mamish, Seda Ogrenci Memik, Thea Aarrestad, Hamza Javed, Vladimir Loncar, Maurizio Pierini, Adrian Alan Pol, Sioni Summers, Javier M. Duarte, Scott Hauck, Shih-Chieh Hsu, Jennifer Ngadiuba, Mia Liu, Duc Hoang, Edward Kreinar, Zhenbin Wu
2019	J	`jnl`	A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. IEEE Trans. Circuits Syst. I Regul. Pap. Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik
2018	J	`jnl`	Machine Learning-Based Temperature Prediction for Runtime Thermal Management Across System Components. IEEE Trans. Parallel Distributed Syst. Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Rajesh Sankaran, Peter H. Beckman
2018	C	`conf`	Minimizing Thermal Variation in Heterogeneous HPC Systems with FPGA Nodes. ICCD Yingyi Luo, Xiaoyang Wang, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Peter H. Beckman
2017	—	`conf`	A content addressable memory with multi-Vdd scheme for low power tunable operation. MWSCAS Siddhartha Joshi, Dawei Li, Seda Ogrenci Memik, Grzegorz Deptuch, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran
2017	A*	`conf`	Adaptive Thermal Management for 3D ICs with Stacked DRAM Caches. DAC Dawei Li, Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik
2017	C	`conf`	Cell-to-array thermal-aware analysis of stacked RRAM. ISCAS Yingyi Luo, Seda Ogrenci Memik, Jie Gu
2017	J	`jnl`	End-to-End Analysis of Integration for Thermocouple-Based Sensors Into 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. Dawei Li, Siddhartha Joshi, Ji-Hoon Kim, Seda Ogrenci Memik
2017	B	`conf`	Evaluating irregular memory access on OpenCL FPGA platforms: A case study with XSBench. FPL Yingyi Luo, Xianshan Wen, Kazutomo Yoshii, Seda Ogrenci Memik, Gokhan Memik, Hal Finkel, Franck Cappello
2016	J	`jnl`	A Partial Carry-Save On-the-Fly Correction Multispeculative Multiplier. IEEE Trans. Computers Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik
2016	A	`conf`	Lazy Pipelines: Enhancing quality in approximate computing. DATE Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy
2015	C	`ed.`	13th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013, Porto, Portugal, October 21-23, 2015 EUC Eli Bozorgzadeh, João M. P. Cardoso, Rui Abreu, Seda Ogrenci Memik
2015	C	`conf`	A methodology for power characterization of associative memories. ICCD Dawei Li, Siddhartha Joshi, Seda Ogrenci Memik, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran
2015	—	`conf`	Edge importance identification for energy efficient graph processing. IEEE BigData S. M. Faisal, Georgios Tziantzioulis, Ali Murat Gok, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy
2015	A	`conf`	Minimizing Thermal Variation Across System Components. IPDPS Kaicheng Zhang, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Rajesh Sankaran, Peter H. Beckman
2015	C	`conf`	On-chip integration of thermoelectric energy harvesting in 3D ICs. ISCAS Dawei Li, Seda Ogrenci Memik, Lawrence J. Henschen
2015	A	`conf`	User-specific skin temperature-aware DVFS for smartphones. DATE Begum Egilmez, Gokhan Memik, Seda Ogrenci Memik, Oguz Ergin
2015	A*	`conf`	b-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units. DAC Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy
2014	J	`jnl`	Improving circuit performance with multispeculative additive trees in high-level synthesis. Microelectron. J. Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina
2013	J	`jnl`	A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths. Integr. Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida
2013	J	`jnl`	Exploring super-resolution implementations across multiple platforms. EURASIP J. Adv. Signal Process. Brian Leung, Seda Ogrenci Memik
2013	C	`conf`	Exploring the energy efficiency of Multispeculative Adders. ICCD Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik
2013	C	`conf`	Integrating thermocouple sensors into 3D ICs. ICCD Dawei Li, Ji-Hoon Kim, Seda Ogrenci Memik
2013	A	`conf`	Multispeculative additive trees in high-level synthesis. DATE Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina
2013	J	`jnl`	Theory and Analysis for Optimization of On-Chip Thermoelectric Cooling Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jieyi Long, Dawei Li, Seda Ogrenci Memik, Semail Ülgen
2012	J	`jnl`	Multispeculative Addition Applied to Datapath Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, José M. Mendías, María C. Molina
2011	C	`conf`	A Comprehensive Tapered buffer optimization algorithm for unified design metrics. ISCAS Song Liu, Seda Ogrenci Memik, Yehea I. Ismail
2011	J	`jnl`	A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, Jose Manuel Mendias, Román Hermida
2011	A*	`conf`	Hardware/software techniques for DRAM thermal management. HPCA Song Liu, Brian Leung, Alexander Neckar, Seda Ogrenci Memik, Gokhan Memik, Nikos Hardavellas
2011	A	`conf`	Power optimization in heterogenous datapaths. DATE Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida
2010	J	`jnl`	A Fast Heuristic Algorithm for Multidomain Clock Skew Scheduling. IEEE Trans. Very Large Scale Integr. Syst. Min Ni, Seda Ogrenci Memik
2010	A*	`conf`	A framework for optimizing thermoelectric active cooling systems. DAC Jieyi Long, Seda Ogrenci Memik
2010	—	`conf`	A revisit to the primal-dual based clock skew scheduling algorithm. ISQED Min Ni, Seda Ogrenci Memik
2010	J	`jnl`	An Approach for Adaptive DRAM Temperature and Power Management. IEEE Trans. Very Large Scale Integr. Syst. Song Liu, Yu Zhang, Seda Ogrenci Memik, Gokhan Memik
2010	B	`conf`	An Interior Point Optimization Solver for Real Time Inter-frame Collision Detection: Exploring Resource-Accuracy-Platform Tradeoffs. FPL Brian Leung, Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra
2010	A	`conf`	Inversed Temperature Dependence aware clock skew scheduling for sequential circuits. DATE Jieyi Long, Seda Ogrenci Memik
2010	A	`conf`	Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers. DATE Jieyi Long, Seda Ogrenci Memik, Matthew Grayson
2010	A	`conf`	Optimization of the bias current network for accurate on-chip thermal monitoring. DATE Jieyi Long, Seda Ogrenci Memik
2010	J	`jnl`	Placement and Floorplanning in Dynamically Reconfigurable FPGAs. ACM Trans. Reconfigurable Technol. Syst. Alessio Montone, Marco D. Santambrogio, Donatella Sciuto, Seda Ogrenci Memik
2010	J	`jnl`	SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation. IEEE Trans. Very Large Scale Integr. Syst. Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail
2010	A	`conf`	Using Speculative Functional Units in high level synthesis. DATE Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik
2009	J	`jnl`	An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-Dimensional Reconfigurable Architectures. Int. J. Reconfigurable Comput. Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik
2009	Misc	`conf`	FPGA Implementation of the Interior-Point Algorithm with Applications to Collision Detection. FCCM Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra
2008	—	`conf`	A Reconfiguration-Aware Floorplacer for FPGAs. ReConFig Alessio Montone, Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik
2008	J	`jnl`	A high-level clustering algorithm targeting dual V ACM Trans. Design Autom. Electr. Syst. Rajarshi Mukherjee, Song Liu, Seda Ogrenci Memik, Somsubhra Mondal
2008	A*	`conf`	A power and temperature aware DRAM architecture. DAC Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik
2008	—	`conf`	An ISPD Jieyi Long, Hai Zhou, Seda Ogrenci Memik
2008	—	`conf`	An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-dimensional Reconfigurable Architectures. ReConFig Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik
2008	A	`conf`	An approach for adaptive DRAM temperature and power management. ICS Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik
2008	A*	`conf`	Automated design of self-adjusting pipelines. DAC Jieyi Long, Seda Ogrenci Memik
2008	J	`jnl`	EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jieyi Long, Hai Zhou, Seda Ogrenci Memik
2008	A*	`conf`	Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction. DAC Min Ni, Seda Ogrenci Memik
2008	J	`jnl`	Optimizing Thermal Sensor Allocation for Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seda Ogrenci Memik, Rajarshi Mukherjee, Min Ni, Jieyi Long
2008	J	`jnl`	Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal
2008	J	`jnl`	Thermal monitoring mechanisms for chip multiprocessors. ACM Trans. Archit. Code Optim. Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee
2008	B	`conf`	Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system. FPL Brian Leung, Yan Pan, Christopher L. Schroeder, Seda Ogrenci Memik, Gokhan Memik, Mitra J. Z. Hartmann
2007	A	`conf`	A novel SoC design methodology combining adaptive software and reconfigurable hardware. ICCAD Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto
2007	A	`conf`	A self-adjusting clock tree architecture to cope with temperature variations. ICCAD Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail
2007	A	`conf`	Early planning for clock skew scheduling during register binding. ICCAD Min Ni, Seda Ogrenci Memik
2007	—	`conf`	Managing Reconfigurable Resources in Heterogeneous Cores Using Portable Pre-Synthesized Templates. SoC Marco D. Santambrogio, Matteo Giani, Seda Ogrenci Memik
2007	A	`conf`	Self-heating-aware optimal wire sizing under Elmore delay model. DATE Min Ni, Seda Ogrenci Memik
2006	—	`conf`	A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. ERSA Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
2006	C	`conf`	Adaptive Metrics for System-Level Functional Partitioning. FDL Giovanni Agosta, Marco D. Santambrogio, Seda Ogrenci Memik
2006	J	`jnl`	An Integrated Approach to Thermal Management in High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. Rajarshi Mukherjee, Seda Ogrenci Memik
2006	—	`conf`	Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology. FPT Vincenzo Rana, Marco D. Santambrogio, Seda Ogrenci Memik, Donatella Sciuto
2006	C	`conf`	Fine-grain thermal profiling and sensor insertion for FPGAs. ISCAS Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik
2006	A	`conf`	Physical aware frequency selection for dynamic thermal management in multi-core systems. ICCAD Rajarshi Mukherjee, Seda Ogrenci Memik
2006	B	`conf`	Power Optimization Techniques for SRAM-Based FPGAs. FPL Somsubhra Mondal, Seda Ogrenci Memik
2006	B	`conf`	Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. FPL Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
2006	Misc	`conf`	Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. FCCM Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
2006	A*	`conf`	Systematic temperature sensor allocation and placement for microprocessors. DAC Rajarshi Mukherjee, Seda Ogrenci Memik
2006	A	`conf`	Thermal sensor allocation and placement for reconfigurable systems. ICCAD Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
2006	A	`conf`	Thermal-induced leakage power optimization by redundant resource allocation. ICCAD Min Ni, Seda Ogrenci Memik
2005	—	`conf`	A low power FPGA routing architecture. ISCAS (2) Somsubhra Mondal, Seda Ogrenci Memik
2005	J	`jnl`	A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2005	J	`jnl`	Early Quality Assessment for Low Power Behavioral Synthesis. J. Low Power Electron. Eren Kursun, Rajarshi Mukherjee, Seda Ogrenci Memik
2005	—	`conf`	Evaluation of dual V ASP-DAC Rajarshi Mukherjee, Seda Ogrenci Memik
2005	—	`conf`	Fine-grain leakage optimization in SRAM based FPGAs. ACM Great Lakes Symposium on VLSI Somsubhra Mondal, Seda Ogrenci Memik
2005	A	`conf`	Hierarchical LUT structures for leakage power reduction (abstract only). FPGA Somsubhra Mondal, Seda Ogrenci Memik, Debasish Das
2005	J	`jnl`	On effective slack management in postscheduling phase. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh
2005	A	`conf`	Peak temperature control and leakage reduction during binding in high level synthesis. ISLPED Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
2005	A	`conf`	Quick Reconfiguration in Clustered Micro-Sequencer. IPDPS Roozbeh Jafari, Seda Ogrenci Memik, Majid Sarrafzadeh
2005	B	`conf`	Real-Time Feature Extraction for High Speed Networks. FPL David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Alok N. Choudhary
2005	—	`conf`	Resource sharing in pipelined CDFG synthesis. ASP-DAC Somsubhra Mondal, Seda Ogrenci Memik
2005	A*	`conf`	Temperature-aware resource allocation and binding in high-level synthesis. DAC Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
2004	Misc	`conf`	Power Management for FPGAs: Power-Driven Design Partitioning. FCCM Rajarshi Mukherjee, Seda Ogrenci Memik
2004	B	`conf`	Power-Driven Design Partitioning. FPL Rajarshi Mukherjee, Seda Ogrenci Memik
2004	J	`jnl`	Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs. J. Circuits Syst. Comput. Elaheh Bozorgzadeh, Seda Ogrenci Memik, Xiaojian Yang, Majid Sarrafzadeh
2003	A	`conf`	Achieving Design Closure Through Delay Relaxation Parameter. ICCAD Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh
2003	J	`jnl`	Analysis and FPGA Implementation of Image Restoration under Resource Constraints. IEEE Trans. Computers Seda Ogrenci Memik, Aggelos K. Katsaggelos, Majid Sarrafzadeh
2003	A*	`conf`	Global resource sharing for synthesis of control data flow graphs on FPGAs. DAC Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, Eren Kursun
2002	C	`conf`	Accelerated SAT-based Scheduling of Control/Data Flow Graphs. ICCD Seda Ogrenci Memik, Farzan Fallah
2002	Misc	`conf`	Design and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable Logic. FCCM Gokhan Memik, Seda Ogrenci Memik, William H. Mangione-Smith
2002	A	`conf`	Early evaluation techniques for low power binding. ISLPED Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh
2002	J	`jnl`	Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh
2001	A	`conf`	A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2001	A	`conf`	Instruction Generation for Hybrid Reconfigurable Systems. ICCAD Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001	—	`conf`	RPack: routability-driven packing for cluster-based FPGAs. ASP-DAC Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh