Sebastian Höppner

67 papers A* 2A 1C 15Journal 28Unranked 21

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	A 12-ADC 25-Core Smart MPSoC Using ABB in 22FDX for 77GHz MIMO Radars at 52.6mW Average Power. CICC Hector A. Gonzalez, Bernhard Vogginger, Chen Liu, Marco Stolba, Florian Kelber, Heiner Bauer, Stefan Hänzsche, Stefan Scholze, Marc Berthel, Tim Rosmeisl, Liyuan Guo, Dennis Walter, Piash Das, Khaleelulla Khan Nazeer, Tilo Schubert, Sebastian Höppner, Christian Mayr
2023	—	`conf`	A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOI. NEWCAS Franz Marcus Schüffny, Stefan Hänzsche, Stephan Henker, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr
2023	—	`conf`	A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI. ISOCC Heiner Bauer, Marco Stolba, Stefan Scholze, Dennis Walter, Christian Mayr, Alexander Oefelein, Sebastian Höppner, André Scharfe, Florian Schraut, Holger Eisenreich
2023	J	`jnl`	A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI. CoRR Heiner Bauer, Marco Stolba, Stefan Scholze, Dennis Walter, Christian Mayr, Alexander Oefelein, Sebastian Höppner, André Scharfe, Florian Schraut, Holger Eisenreich
2022	J	`jnl`	A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI. IEEE Trans. Biomed. Circuits Syst. Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Richard George, Florian Kelber, Heiner Bauer, Stefan Scholze, Stefan Hänzsche, Marco Stolba, Andreas Dixius, Georg Ellguth, Dennis Walter, Sebastian Höppner, Christian Mayr
2022	—	`conf`	A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI. ISVLSI Mattis Hasler, Sebastian Haas, Robert Wittig, Stefan Scholze, Andreas Dixius, Sebastian Höppner, Gerhard P. Fettweis, Christian Mayr
2022	—	`conf`	A Single Battery Supply Power Concept for a Neuro Recording and Flexible Processing Chain in 22 nm. NorCAS Franz Marcus Schüffny, Stefan Hänzsche, Marc Berthel, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr
2022	J	`jnl`	An Ultra-Low Area Digital-Assisted Neuro Recording System in 22nm FDSOI Technology. IEEE Trans. Circuits Syst. II Express Briefs Franz Marcus Schüffny, Sebastian Höppner, Stefan Hänzsche, Richard Miru George, Seyed Mohammad Ali Zeinolabedin, Christian Mayr
2022	—	`conf`	How to design an input stage for neural recording system in 22 nm FDSOI. PRIME Franz Marcus Schüffny, Sebastian Höppner, Seyed Mohammad Ali Zeinolabedin, Richard Miru George, Christian Mayr
2022	—	`conf`	ZEN: A flexible energy-efficient hardware classifier exploiting temporal sparsity in ECG data. AICAS Matthias Jobst, Johannes Partzsch, Chen Liu, Liyuan Guo, Dennis Walter, Saif-Ur Rehman, Stefan Scholze, Sebastian Höppner, Christian Mayr
2021	J	`jnl`	Comparing Loihi with a SpiNNaker 2 prototype on low-latency keyword spotting and adaptive robotic control. Neuromorph. Comput. Eng. Yexin Yan, Terrence C. Stewart, Xuan Choo, Bernhard Vogginger, Johannes Partzsch, Sebastian Höppner, Florian Kelber, Chris Eliasmith, Steve B. Furber, Christian Mayr
2021	J	`jnl`	Hardware Acceleration of EEG-Based Emotion Classification Systems: A Comprehensive Survey. IEEE Trans. Biomed. Circuits Syst. Hector A. Gonzalez, Richard George, Shahzad Muzaffar, Javier Acevedo, Sebastian Höppner, Christian Mayr, Jerald Yoo, Frank H. P. Fitzek, Ibrahim M. Elfadel
2021	J	`jnl`	Hardware Implementation of an OPC UA Server for Industrial Field Devices. CoRR Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr
2021	J	`jnl`	Hardware Implementation of an OPC UA Server for Industrial Field Devices. IEEE Trans. Very Large Scale Integr. Syst. Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr
2021	C	`conf`	Opportunities For A Hardware-Based OPC UA Server Implementation In Industry 4.0. IECON Zohra Charania, Chris Paul Iatrou, Valentin Khaydarov, Richard Jacob, Robert Wittig, Heiner Bauer, Sebastian Höppner, René Bachmann, Philipp Bauer, Hendrik Deckert, Christian Mayr, Gerhard P. Fettweis, Leon Urbas
2021	J	`jnl`	The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing. CoRR Sebastian Höppner, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Marco Stolba, Florian Kelber, Bernhard Vogginger, Felix Neumärker, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Thomas Hocker, Dennis Walter, Gengting Liu, Jim D. Garside, Steve B. Furber, Christian Mayr
2021	C	`conf`	Ultra-High Compression of Twiddle Factor ROMs in Multi-Core DSP for FMCW Radars. ISCAS Hector A. Gonzalez, Florian Kelber, Marco Stolba, Chen Liu, Bernhard Vogginger, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Christian Mayr
2020	—	`conf`	A 0.55V 6.3uW/MHz Arm Cortex-M4 MCU with Adaptive Reverse Body Bias and Single Rail SRAM. COOL CHIPS Dennis Walter, André Scharfe, Alexander Oefelein, Florian Schraut, Heiner Bauer, Farkas Csaszar, Robert Niebsch, Jörg Schreiter, Holger Eisenreich, Sebastian Höppner
2020	J	`jnl`	Adaptive Body Bias Aware Implementation for Ultra-Low-Voltage Designs in 22FDX Technology. IEEE Trans. Circuits Syst. II Express Briefs Sebastian Höppner, Holger Eisenreich, Dennis Walter, André Scharfe, Alexander Oefelein, Florian Schraut, Jörg Schreiter, Thorsten Riedel, Heiner Bauer, Robert Niebsch, Stephan Scherzer, Thomas Hocker, Stefan Scholze, Stephan Henker, Matthias Nossmann, Ulrich Hensel, Helmut Prengel
2020	J	`jnl`	Low-Power Low-Latency Keyword Spotting and Adaptive Control with a SpiNNaker 2 Prototype and Comparison with Loihi. CoRR Yexin Yan, Terrence C. Stewart, Xuan Choo, Bernhard Vogginger, Johannes Partzsch, Sebastian Höppner, Florian Kelber, Chris Eliasmith, Steve B. Furber, Christian Mayr
2020	J	`jnl`	Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. J. Signal Process. Syst. Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
2019	C	`conf`	A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology. ISCAS Florian Schraut, Holger Eisenreich, Sebastian Höppner, Christian Mayr
2019	C	`conf`	A Multi-Bit PFD Architecture for ADPLLs with Built-In Jitter Self-Calibration. ISCAS Franz Marcus Schüffny, Sebastian Höppner, Alexander Oefelein, Christian Mayr
2019	J	`jnl`	Dynamic Power Management for Neuromorphic Many-Core Systems. CoRR Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumaerker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr
2019	J	`jnl`	Dynamic Power Management for Neuromorphic Many-Core Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr
2019	J	`jnl`	Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype. CoRR Yexin Yan, David Kappel, Felix Neumärker, Johannes Partzsch, Bernhard Vogginger, Sebastian Höppner, Steve B. Furber, Wolfgang Maass, Robert Legenstein, Christian Mayr
2019	J	`jnl`	Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype. IEEE Trans. Biomed. Circuits Syst. Yexin Yan, David Kappel, Felix Neumärker, Johannes Partzsch, Bernhard Vogginger, Sebastian Höppner, Steve B. Furber, Wolfgang Maass, Robert Legenstein, Christian Mayr
2019	C	`conf`	Hard Real-Time Capable OPC UA Server as Hardware Peripheral for Single Chip IoT Systems. ETFA Chris Paul Iatrou, Heiner Bauer, Markus Graube, Sebastian Höppner, Julian Rahm, Leon Urbas
2019	—	`conf`	How to Achieve World-Leading Energy Efficiency using 22FDX with Adaptive Body Biasing on an Arm Cortex-M4 IoT SoC. ESSDERC Sebastian Höppner, Jörg Schreiter, Robert Niebsch, Stephan Scherzer, Ulrich Hensel, Jörg Winkler, Mario Orgis, Holger Eisenreich, Dennis Walter, Uwe Steeb, André Scharfe, Clifford Dmello, Robert Sinkwitz, Heiner Bauer, Alexander Oefelein, Florian Schraut
2019	J	`jnl`	Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. CoRR Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
2019	C	`conf`	Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS. VLSI-SoC Florian Protze, Martin Kreißig, Frank Ellinger, Sebastian Höppner, Stephan Hartmann, Stefan Hänzsche, Stefan Scholze, Georg Ellguth, Christian Mayr
2019	J	`jnl`	SpiNNaker 2: A 10 Million Core Processor System for Brain Simulation and Machine Learning. CoRR Christian Mayr, Sebastian Höppner, Steve B. Furber
2018	C	`conf`	Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip. ARITH Mantas Mikaitis, David R. Lester, Delong Shang, Steve B. Furber, Gengting Liu, Jim D. Garside, Stefan Scholze, Sebastian Höppner, Andreas Dixius
2017	A*	`conf`	A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2017	C	`conf`	A fixed point exponential function accelerator for a neuromorphic many-core system. ISCAS Johannes Partzsch, Sebastian Höppner, Matthias Eberlein, René Schüffny, Christian Mayr, David R. Lester, Steve B. Furber
2017	J	`jnl`	Application-specific architectures for energy-efficient database query processing and optimization. Microprocess. Microsystems Sebastian Haas, Stefan Scholze, Sebastian Höppner, Annett Ungethüm, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
2017	C	`conf`	Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2017	—	`conf`	Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology. NORCAS Heiner Bauer, Sebastian Höppner, Johannes Partzsch, Dennis Walter, Christian Mayr, Florian Schraut, Holger Eisenreich
2017	C	`conf`	Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2016	J	`jnl`	A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits. IEEE Trans. Biomed. Circuits Syst. Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2016	J	`jnl`	A Calibration Technique for Bang-Bang ADPLLs Using Jitter Distribution Monitoring. IEEE Trans. Very Large Scale Integr. Syst. Sebastian Höppner, Johannes Partzsch, Johannes Neumann, René Schüffny, Christian Mayr
2016	—	`conf`	A database accelerator for energy-efficient query processing and optimization. NORCAS Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
2016	A*	`conf`	An MPSoC for energy-efficient database query processing. DAC Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis
2016	—	`conf`	True random number generation from bang-bang ADPLL jitter. NORCAS Felix Neumärker, Sebastian Höppner, Andreas Dixius, Christian Mayr
2015	—	`conf`	A deep-submicron CMOS flow for general-purpose timing-detection insertion. MIXDES Andreas Dixius, Dennis Walter, Sebastian Höppner, Holger Eisenreich, René Schüffny
2015	J	`jnl`	An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS. IEEE J. Solid State Circuits Sebastian Höppner, Dennis Walter, Thomas Hocker, Stephan Henker, Stefan Hänzsche, Daniel Sausner, Georg Ellguth, Jens-Uwe Schluessler, Holger Eisenreich, René Schüffny
2015	C	`conf`	An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology. ISCAS Sebastian Höppner, Stefan Hänzsche, Stefan Scholze, René Schüffny
2014	—	`conf`	10.7 A 105GOPS 36mm ISSCC Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny
2014	—	`conf`	A 10 bit 16 MS/s redundant SAR ADC with flexible window function for a digitally controlled DC-DC converter in 28 nm CMOS. NORCHIP Stefan Hänzsche, Sebastian Höppner, René Schüffny
2014	J	`jnl`	A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Stefan Hänzsche, Sebastian Höppner, Georg Ellguth, René Schüffny
2014	J	`jnl`	A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor Circuits. CoRR Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2014	C	`conf`	A compact on-chip IR-drop measurement system in 28 nm CMOS technology. ISCAS Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler
2014	—	`conf`	An energy efficient multi-bit TSV transmitter using capacitive coupling. ICECS Johannes Gorner, Sebastian Höppner, Dennis Walter, Michael Haas, Dirk Plettemeier, René Schüffny
2014	J	`jnl`	Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS. CoRR Marko Noack, Johannes Partzsch, Christian Mayr, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2013	J	`jnl`	A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. Sebastian Höppner, Holger Eisenreich, Stephan Henker, Dennis Walter, Georg Ellguth, René Schüffny
2013	J	`jnl`	A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny
2013	—	`conf`	Live demonstration: A 90GBit/s serial NoC link over 6mm in 65nm CMOS technology. ECCTD Sebastian Höppner, Dennis Walter, Holger Eisenreich, Stefan Schiefer, René Schüffny
2012	J	`jnl`	A 32 GBit/s communication SoC for a waferscale neuromorphic system. Integr. Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny
2012	—	`conf`	A 335Mb/s 3.9mm ISSCC Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori
2012	C	`conf`	A power management architecture for fast per-core DVFS in heterogeneous MPSoCs. ISCAS Sebastian Höppner, Chenming Shao, Holger Eisenreich, Georg Ellguth, Mario Ander, René Schüffny
2012	—	`conf`	A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS. ISSCC Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stephan Henker, Stefan Hänzsche, René Schüffny, Markus Winter, Gerhard P. Fettweis
2012	J	`jnl`	On-Chip Measurement and Compensation of Timing Imbalances in High-Speed Serial NoC Links. Int. J. Embed. Real Time Commun. Syst. Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
2011	—	`conf`	Mismatch characterization of high-speed NoC links using asynchronous sub-sampling. SoC Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
2011	A	`conf`	Strategies for initial sizing and operating point analysis of analog circuits. DATE Volker Boos, Jacek Nowak, Matthias Sylvester, Stephan Henker, Sebastian Höppner, Heiko Grimm, Dominik Krausse, Ralf Sommer
2010	C	`conf`	A low-power cell-based-design multi-port register file in 65nm CMOS technology. ISCAS Johannes Uhlig, Sebastian Höppner, Georg Ellguth, René Schüffny
2010	—	`conf`	Efficient compensation of delay variations in high-speed network-on-chip data links. SoC Sebastian Höppner, Dennis Walter, Holger Eisenreich, René Schüffny
2010	C	`conf`	Wide swing signal amplification by SC voltage doubling. ISCAS Sebastian Höppner, René Schüffny, Zuo-Min Tsai, Huei Wang