Sebastian Huhn

27 papers A 3B 7C 2Misc 2Journal 1Unranked 11

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	Self-Aware Silicon: Enhancing Lifecycle Management with Intelligent Testing and Data Insights. ETS Fabian Vargas, Marko S. Andjelkovic, Milos Krstic, Anirban Kar, Swati Deshwal, Yogesh Singh Chauhan, Hussam Amrouch, Daniel Tille, Sebastian Huhn
2024	B	`conf`	A Multi-Objective Evolutionary Approach for Test Network Design. ETS Payam Habiby, Fatemeh Shirinzadeh, Sebastian Huhn, Rolf Drechsler
2023	Misc	`conf`	A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin. VTS Daniel Tille, Leon Klimasch, Sebastian Huhn
2023	A	`conf`	Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. DATE Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr
2023	B	`conf`	Increasing SAT-Resilience of Logic Locking Mechanisms using Formal Methods. ETS Marcel Merten, Sebastian Huhn, Rolf Drechsler
2023	—	`conf`	RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks. DFT Payam Habiby, Sebastian Huhn, Rolf Drechsler
2023	B	`conf`	Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips. ETS Payam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn, Rolf Drechsler
2022	Misc	`conf`	A Hardware-based Evolutionary Algorithm with Multi-Objective Optimization Operators for On-Chip Transient Fault Detection. VTS Marcel Merten, Sebastian Huhn, Rolf Drechsler
2022	A	`conf`	Next Generation Design For Testability, Debug and Reliability Using Formal Techniques. ITC Sebastian Huhn, Rolf Drechsler
2022	B	`conf`	Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal Methods. ETS Marcel Merten, Sebastian Huhn, Rolf Drechsler
2021	—	`conf`	A Codeword-based Compactor for On-Chip Generated Debug Data Using Two-Stage Artificial Neural Networks. DFT Marcel Merten, Sebastian Huhn, Rolf Drechsler
2021	—	`conf`	Optimization-based Test Scheduling for IEEE 1687 Multi-Power Domain Networks Using Boolean Satisfiability. DTIS Payam Habiby, Sebastian Huhn, Rolf Drechsler
2020	C	`conf`	Combining Machine Learning and Formal Techniques for Small Data Applications - A Framework to Explore New Structural Materials. DSD Rolf Drechsler, Sebastian Huhn, Christina Plump
2020	—	`—`	Next generation design for testability, debug and reliability using formal techniques. Sebastian Huhn
2020	—	`conf`	Power-aware Test Scheduling for IEEE 1687 Networks with Multiple Power Domains. DFT Payam Habiby, Sebastian Huhn, Rolf Drechsler
2019	—	`conf`	A Hybrid Embedded Multichannel Test Compression Architecture for Low-Pin Count Test Environments in Safety-Critical Systems. ITC-Asia Sebastian Huhn, Daniel Tille, Rolf Drechsler
2019	J	`jnl`	Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler
2019	B	`conf`	Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns. ETS Sebastian Huhn, Daniel Tille, Rolf Drechsler
2019	C	`conf`	SAT-Hard: A Learning-Based Hardware SAT-Solver. DSD Buse Ustaoglu, Sebastian Huhn, Frank Sill Torres, Daniel Große, Rolf Drechsler
2018	—	`conf`	Building Fast Multi Agent Systems Using Hardware Design Languages for High-Throughput Systems. LDIC Jannis Stoppe, Christina Plump, Sebastian Huhn, Rolf Drechsler
2018	—	`conf`	SAT-Lancer: A Hardware SAT-Solver for Self-Verification. ACM Great Lakes Symposium on VLSI Buse Ustaoglu, Sebastian Huhn, Daniel Große, Rolf Drechsler
2017	—	`conf`	Enhancing robustness of sequential circuits using application-specific knowledge and formal methods. ASP-DAC Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler
2017	A	`conf`	Optimization of retargeting for IEEE 1149.1 TAP controllers with embedded compression. DATE Sebastian Huhn, Stephan Eggersglüß, Krishnendu Chakrabarty, Rolf Drechsler
2017	—	`conf`	Reconfigurable TAP controllers with embedded compression for large test data volume. DFT Sebastian Huhn, Stephan Eggersglüß, Rolf Drechsler
2017	—	`conf`	Revealing properties of structural materials by combining regression-based algorithms and nano indentation measurements. SSCI Sebastian Huhn, Heike Sonnenberg, Stephan Eggersglüß, Brigitte Clausen, Rolf Drechsler
2016	—	`conf`	Exploring superior structural materials using multi-objective optimization and formal techniques. ISED Rolf Drechsler, Stephan Eggersglüß, Nils Ellendt, Sebastian Huhn, Lutz Mädler
2016	B	`conf`	VecTHOR: Low-cost compression architecture for IEEE 1149-compliant TAP controllers. ETS Sebastian Huhn, Stephan Eggersglüß, Rolf Drechsler