Sebastian Hoyos

76 papers B 2C 2Misc 3Journal 44Unranked 25
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 56-Gb/s DAC/ADC-Based Multicarrier Transceiver With TX Polar DSP and RX MIMO-DSP for >40-dB Loss Channel.
IEEE Solid State Circuits Lett.
Srujan Kumar Kaile, Julian Camilo Gomez Diaz, Yuanming Zhu, Il-Min Yi, Tong Liu, Sebastian Hoyos, Samuel Palermo
2025 J jnl
Multi-Channel Analog Beamforming Transceiver for mmWave Communications.
IEEE Trans. Mob. Comput.
Haotian Zhao, Kamran Entesari, Sebastian Hoyos
2024 J jnl
A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET.
IEEE J. Solid State Circuits
Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
2024 — conf
A 56Gbps ADC/DAC-Based Jitter-Robust Multicarrier Transceiver with RX MIMO-DSP for > 40dB Loss Channel.
A-SSCC
Srujan Kumar Kaile, Julian Camilo Gomez Diaz, Yuanming Zhu, Ii-Min Yi, Sebastian Hoyos, Samuel Palermo
2024 — conf
Comparisons of Metastability Impact in Time-Domain and Asynchronous SAR ADCs for Serial I/O Receivers.
MWSCAS
Gijin Park, Srujan Kumar Kaile, Il-Min Yi, Sebastian Hoyos, Samuel Palermo
2024 J jnl
Guest Editorial Special Issue on the 2024 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Edoardo Bonizzoni, Sebastian Hoyos, Antonio Liscidini
2024 J jnl
Multi-Channel Nonlinearity Mitigation Using Machine Learning Algorithms.
IEEE Trans. Mob. Comput.
Haotian Zhao, Julian Camilo Gomez Diaz, Sebastian Hoyos
2024 — conf
Multi-Channel Nonlinearity Mitigation Using Neural-Network-Based Feedback Cancellation with Channel Decision Passing Algorithm.
MWSCAS
Haotian Zhao, Sebastian Hoyos
2023 J jnl
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET.
IEEE J. Solid State Circuits
Yuanming Zhu, Tong Liu, Srujan Kumar Kaile, Shiva Kiran, Il-Min Yi, Ruida Liu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
2023 — conf
A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET.
VLSI Technology and Circuits
Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
2023 J jnl
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET.
IEEE J. Solid State Circuits
Yuanming Zhu, Julian Camilo Gomez Diaz, Srujan Kumar Kaile, Il-Min Yi, Tong Liu, Sebastian Hoyos, Samuel Palermo
2023 J jnl
Guest Editorial Special Issue on the 2023 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Edoardo Bonizzoni, Sebastian Hoyos
2023 J jnl
Guest Editorial Special Issue on the 2023 ISICAS: A CAS Journal Track Symposium.
IEEE Trans. Circuits Syst. II Express Briefs
Edoardo Bonizzoni, Sebastian Hoyos
2022 — conf
A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET.
CICC
Yuanming Zhu, Tong Liu, Srujan Kumar Kaile, Shiva Kiran, Il-Min Yi, Ruida Liu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
2022 — conf
A Jitter-Robust 40Gb/s ADC-Based Multicarrier Receiver Front End in 22nm FinFET.
CICC
Yuanming Zhu, Julian Camilo Gomez Diaz, Srujan Kumar Kaile, Il-Min Yi, Tong Liu, Sebastian Hoyos, Samuel Palermo
2022 J jnl
Guest Editorial Special Issue on the 2022 ISICAS: A CAS Journal Track Symposium.
IEEE Trans. Circuits Syst. II Express Briefs
Edoardo Bonizzoni, Sebastian Hoyos
2022 J jnl
Multi-Channel Receiver Nonlinearity Cancellation Using Channel Speculation Passing Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs
Haotian Zhao, Julian Camilo Gomez Diaz, Sebastian Hoyos
2022 J jnl
Recurrent Neural Network Equalization for Wireline Communication Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Julian Camilo Gomez Diaz, Haotian Zhao, Yuanming Zhu, Samuel Palermo, Sebastian Hoyos
2022 J jnl
Special Issue on the 2022 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Edoardo Bonizzoni, Sebastian Hoyos
2020 — conf
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS.
CICC
Yuanming Zhu, Shengchang Cai, Shiva Kiran, Yang-Hang Fan, Po-Hsuan Chang, Sebastian Hoyos, Samuel Palermo
2020 J jnl
Kalman-Based Real-Time Functional Decomposition for the Spectral Calibration in Swept Source Optical Coherence Tomography.
IEEE Trans. Biomed. Circuits Syst.
Amir Tofighi Zavareh, Sebastian Hoyos
2019 — conf
A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE.
CICC
Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo
2019 J jnl
A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS.
IEEE J. Solid State Circuits
Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo
2019 — conf
Blocker-Tolerant RF-to-Digital Linearization With a Very Nonlinear Auxiliary Path.
MWSCAS
Julian Camilo Gomez Diaz, Amir Tofighi Zavareh, Lester Boampong, Sebastian Hoyos
2019 — conf
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper).
MWSCAS
Julian Camilo Gomez Diaz, Shiva Kiran, Samuel Palermo, Sebastian Hoyos
2018 — conf
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE.
CICC
Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo
2018 — conf
The Spectral Calibration of Swept-Source Optical Coherence Tomography Systems Using Unscented Kalman Filter.
BioCAS
Amir Tofighi Zavareh, Sebastian Hoyos
2017 J jnl
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS.
IEEE J. Solid State Circuits
Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo
2017 — conf
An efficient estimation algorithm for the calibration of low-cost SS-OCT systems.
ISBI
Amir Tofighi Zavareh, Oscar Barajas, Sebastian Hoyos
2017 J jnl
Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jun Zhou, Amir Tofighi Zavareh, Robin Gupta, Liang Liu, Zhongfeng Wang, Brian M. Sadler, José Silva-Martínez, Sebastian Hoyos
2017 C conf
Towards an on-chip signal processing solution for the online calibration of SS-OCT systems.
ISCAS
Oscar Barajas, Amir Tofighi Zavareh, Sebastian Hoyos
2016 J jnl
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization.
IEEE J. Solid State Circuits
Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo
2016 J jnl
A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS.
IEEE J. Solid State Circuits
Haoyu Qian, Qiyuan Liu, José Silva-Martínez, Sebastian Hoyos
2016 — conf
A novel continuous time ternary encoding based SS-OCT calibration.
BioCAS
Amir Tofighi Zavareh, Oscar Barajas, Michael Serafino, Javier A. Jo, Brian E. Applegate, Brian M. Sadler, Sebastian Hoyos
2016 J jnl
CMOS ADC-based receivers for high-speed electrical and optical links.
IEEE Commun. Mag.
Samuel Palermo, Sebastian Hoyos, Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Shiva Kiran, Keytaek Lee
2016 — conf
Compressed Power Spectral Density Estimation via Group-Based Total Variation Minimization.
SiPS
Jun Zhou, Zhongfeng Wang, Sebastian Hoyos
2015 — conf
3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS.
ISSCC
Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo
2015 — conf
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS.
VLSIC
Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo
2015 J jnl
A Process-Variation Resilient Current Mode Logic With Simultaneous Regulations for Time Constant, Voltage Swing, Level Shifting, and DC Gain Using Time-Reference-Based Adaptive Biasing Chain.
IEEE Trans. Very Large Scale Integr. Syst.
Hyung-Joon Jeon, José Silva-Martínez, Sebastian Hoyos
2014 J jnl
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications.
IEEE J. Solid State Circuits
Ehsan Zhian Tabasy, Ayman Shafik, Keytaek Lee, Sebastian Hoyos, Samuel Palermo
2014 — conf
A single parity check forward error correction method for high speed I/O.
GlobalSIP
Shiva Kiran, Sebastian Hoyos, Samuel Palermo
2013 J jnl
A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS.
IEEE J. Solid State Circuits
Ehsan Zhian Tabasy, Ayman Shafik, Shan Huang, Noah Hae-Woong Yang, Sebastian Hoyos, Samuel Palermo
2013 — conf
Asynchronous Binary Compressive Sensing for Wireless Body Sensor Networks.
MSN
Jun Zhou, Sebastian Hoyos
2013 Misc conf
Compressed Digital Beamformer with asynchronous sampling for ultrasound imaging.
ICASSP
Jun Zhou, Yong He, Mohan Chirala, Brian M. Sadler, Sebastian Hoyos
2012 J jnl
A 15 MHz to 600 MHz, 20 mW, 0.38 mm
IEEE Trans. Very Large Scale Integr. Syst.
Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic
2012 — conf
A 6b 1.6GS/s ADC with redundant cycle 1-tap embedded DFE in 90nm CMOS.
CICC
Ehsan Zhian Tabasy, Ayman Shafik, S. Huang, N. Yang, Sebastian Hoyos, Samuel Palermo
2012 J jnl
A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Xi Chen, Ehab Ahmed Sobhy, Zhuizhuan Yu, Sebastian Hoyos, José Silva-Martínez, Samuel Palermo, Brian M. Sadler
2012 J jnl
Digital-Assisted Asynchronous Compressive Sensing Front-End.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Jun Zhou, Mario A. Ramirez, Samuel Palermo, Sebastian Hoyos
2012 J jnl
Least mean squared Background Calibration for OFDM Multichannel Receivers.
J. Circuits Syst. Comput.
Krishna Pentakota, Mario A. Ramirez, Sebastian Hoyos
2012 J jnl
Sensitivity Analysis of Continuous-Time Δ Σ ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ramy Saad, Diego Luis Aristizábal-Ramirez, Sebastian Hoyos
2012 J jnl
The impact of ADC nonlinearity in a mixed-signal compressive sensing system for frequency-domain sparse signals.
Phys. Commun.
Zhuizhuan Yu, Jun Zhou, Mario A. Ramirez, Sebastian Hoyos, Brian M. Sadler
2011 J jnl
A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xi Chen, Zhuizhuan Yu, Sebastian Hoyos, Brian M. Sadler, José Silva-Martínez
2011 J jnl
Analytical framework and bandwidth optimisation of orthogonal frequency division multiplexing low-order multi-channel filter-bank receivers for achieving sampling clock-jitter robustness.
IET Circuits Devices Syst.
Ehab Ahmed Sobhy, Srikanth Pentakota, Zhuizhuan Yu, Sebastian Hoyos
2011 J jnl
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sebastian Hoyos, Srikanth Pentakota, Zhuizhuan Yu, Ehab Sobhy Abdel Ghany, Xi Chen, Ramy Saad, Samuel Palermo, José Silva-Martínez
2011 J jnl
Corrections to "A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing".
IEEE Trans. Circuits Syst. I Regul. Pap.
Xi Chen, Zhuizhuan Yu, Sebastian Hoyos, Brian M. Sadler, José Silva-Martínez
2011 C conf
Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers.
ISCAS
Ramy Saad, Sebastian Hoyos
2010 J jnl
A Multiphase Multipath Technique With Digital Phase Shifters for Harmonic Distortion Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs
Ehab Ahmed Sobhy, Sebastian Hoyos
2010 J jnl
A Sixth-Order 200 MHz IF Bandpass Sigma-Delta Modulator With Over 68 dB SNDR in 10 MHz Bandwidth.
IEEE J. Solid State Circuits
Cho-Ying Lu, Jose Fabian Silva-Rivas, Praveena Kode, José Silva-Martínez, Sebastian Hoyos
2010 J jnl
Mixed-Signal Parallel Compressive Spectrum Sensing for Cognitive Radios.
Int. J. Digit. Multim. Broadcast.
Zhuizhuan Yu, Xi Chen, Sebastian Hoyos, Brian M. Sadler, Jingxuan Gong, Chengliang Qian
2009 — conf
A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider.
CICC
Yung-Chung Lo, Hsien-Pu Chen, José Silva-Martínez, Sebastian Hoyos
2009 B conf
Compressive Spectrum Sensing Front-ends for Cognitive Radios.
SMC
Zhuizhuan Yu, Sebastian Hoyos
2008 — conf
A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS.
ESSCIRC
Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic
2008 J jnl
Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers.
IEEE Trans. Circuits Syst. II Express Briefs
Pradeep Kotte Prakasam, Mandar Kulkarni, Xi Chen, Zhuizhuan Yu, Sebastian Hoyos, José Silva-Martínez, Edgar Sánchez-Sinencio
2008 — conf
Background ADC calibration in digital domain.
CICC
Cheongyuen W. Tsang, Yun Chiu, Johan P. Vanderhaegen, Sebastian Hoyos, Charles Chen, Robert W. Brodersen, Borivoje Nikolic
2008 Misc conf
Mixed-signal parallel compressed sensing and reception for cognitive radio.
ICASSP
Zhuizhuan Yu, Sebastian Hoyos, Brian M. Sadler
2007 J jnl
UWB Mixed-Signal Transform-Domain Direct-Sequence Receiver.
IEEE Trans. Wirel. Commun.
Sebastian Hoyos, Brian M. Sadler
2006 J jnl
Broadband multicarrier communication receiver based on analog to digital conversion in the frequency domain.
IEEE Trans. Wirel. Commun.
Sebastian Hoyos, Brian M. Sadler, Gonzalo R. Arce
2005 J jnl
Monobit digital receivers for ultrawideband communications.
IEEE Trans. Wirel. Commun.
Sebastian Hoyos, Brian M. Sadler, Gonzalo R. Arce
2005 J jnl
Spectral design of weighted median Filters: A general iterative approach.
IEEE Trans. Signal Process.
Sebastian Hoyos, Jan Bacca Rodríguez, Gonzalo R. Arce
2005 J jnl
Ultra-wideband analog-to-digital conversion via signal expansion.
IEEE Trans. Veh. Technol.
Sebastian Hoyos, Brian M. Sadler
2005 B conf
Ultra-wideband multicarrier communication receiver based on analog to digital conversion in the frequency domain.
WCNC
Sebastian Hoyos, Brian M. Sadler, Gonzalo R. Arce
2004 — conf
High-speed A/D conversion for ultra-wideband signals based on signal projection over basis functions.
ICASSP (4)
Sebastian Hoyos, Brian M. Sadler, Gonzalo R. Arce
2004 J jnl
Mixed-signal equalization architectures for printed circuit board channels.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sebastian Hoyos, Jorge A. García, Gonzalo R. Arce
2004 — conf
Weighted median based filters for the complex domain.
ICASSP (2)
Jan Bacca Rodríguez, Sebastian Hoyos, Yinbo Li, Gonzalo R. Arce
2004 J jnl
Weighted median filters admitting complex-valued weights and their optimization.
IEEE Trans. Signal Process.
Sebastian Hoyos, Yinbo Li, Jan Bacca Rodríguez, Gonzalo R. Arce
2002 Misc conf
Mixed-signal equalization architectures for printed circuit board channels.
ICASSP
Sebastian Hoyos, Jorge A. García, Gonzalo R. Arce