Scott Little

20 papers A 1B 4C 2Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2014 — conf
LEMA: A tool for the formal verification of digitally-intensive analog/mixed-signal circuits.
MWSCAS
Andrew N. Fisher, Satish Batchu, Kevin R. Jones, Dhanashree Kulkarni, Scott Little, David Walter, Chris J. Myers
2012 J jnl
Synchronizing AMS Assertions with AMS Simulation: From Theory to Practice.
ACM Trans. Design Autom. Electr. Syst.
Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay, Scott Little, John Havlicek, Srikanth Chandrasekaran
2011 B conf
Realtime regular expressions for analog and mixed-signal assertions.
FMCAD
John Havlicek, Scott Little
2011 J jnl
Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Scott Little, David Walter, Chris J. Myers, Robert A. Thacker, Satish Batchu, Tomohiro Yoneda
2010 J jnl
Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces.
Int. J. Found. Comput. Sci.
Scott Little, David Walter, Kevin R. Jones, Chris J. Myers, Alper Sen
2010 — conf
Property-Based Monitoring of Analog and Mixed-Signal Systems.
FORMATS
John Havlicek, Scott Little, Oded Maler, Dejan Nickovic
2009 C conf
A new verification method for embedded systems.
ICCD
Robert A. Thacker, Chris J. Myers, Kevin R. Jones, Scott Little
2008 — —
Efficient Modeling and Verification of Analog/Mixed Signal Circuits Using Labeled Hybrid Petri nets.
Scott Little
2008 J jnl
Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
David Walter, Scott Little, Chris J. Myers, Nicholas Seegmiller, Tomohiro Yoneda
2007 B conf
Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces.
ATVA
Scott Little, David Walter, Kevin R. Jones, Chris J. Myers
2007 — conf
Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits.
MTV
Scott Little, Alper Sen, Chris J. Myers
2007 B conf
Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver.
ATVA
David Walter, Scott Little, Chris J. Myers
2007 — conf
Symbolic Model Checking of Analog/Mixed-Signal Circuits.
ASP-DAC
David Walter, Scott Little, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda
2006 A conf
Verification of analog/mixed-signal circuits using labeled hybrid petri nets.
ICCAD
Scott Little, Nicholas Seegmiller, David Walter, Chris J. Myers, Tomohiro Yoneda
2006 J jnl
Verification of timed circuits with failure-directed abstractions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda
2005 — conf
The Case for Analog Circuit Verification.
FAC
Chris J. Myers, Reid R. Harrison, David Walter, Nicholas Seegmiller, Scott Little
2004 B conf
Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets.
ATVA
Scott Little, David Walter, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda
2003 C conf
Verification of Timed Circuits with Failure Directed Abstractions.
ICCD
Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda
2001 — conf
Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS.
ARVLSI
Chris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris J. Myers, Christian Schlegel
2001 — conf
The E/S Tool IT-Support for Ergonomic and Sociotechnical System Design.
ER (Workshops)
Martin Van De Bovenkamp, Ruben Jongkind, Gu Van Rhijn, Frans M. van Eijnatten, Gudela Grote, Jouni Lehtelä, Timo Leskinen, Peter Vink, Scott Little, Toni Wäfler