Scott K. Reynolds

37 papers A 2Misc 1Journal 21Unranked 13
YearRankTypeTitle / Venue / Authors
2018 J jnl
A Fully Decoupled LC Tank VCO Topology for Amplitude Boosted Low Phase Noise Operation.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Tejasvi Anand, Scott K. Reynolds
2018 — conf
Circuit and antenna-in-package innovations for scaled mmWave 5G phased array modules.
CICC
Alberto Valdes-Garcia, Bodhisatwa Sadhu, Xiaoxiong Gu, Yahya M. Tousi, Duixian Liu, Scott K. Reynolds, Joakim Hallin, Stefan Sahl, Leonard Rexberg
2018 J jnl
Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C.
IEEE J. Solid State Circuits
Wooram Lee, Jean-Olivier Plouchart, Caglar Ozdag, Yigit Aydogan, Mark Yeck, Alper Cabuk, Asim Kepkep, Scott K. Reynolds, Emre Apaydin, Alberto Valdes-Garcia
2017 — conf
7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication.
ISSCC
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Daniel J. Friedman, Alberto Valdes-Garcia
2017 J jnl
A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Mark A. Ferriss, Duixian Liu, Daniel J. Friedman, Alberto Valdes-Garcia
2015 J jnl
W-band scalable phased arrays for imaging and communications.
IEEE Commun. Mag.
Xiaoxiong Gu, Alberto Valdes-Garcia, Arun Natarajan, Bodhisatwa Sadhu, Duixian Liu, Scott K. Reynolds
2013 J jnl
A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jean-Olivier Plouchart, Mark A. Ferriss, Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Larry T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
2013 — conf
A 60GHz, linear, direct down-conversion mixer with mm-Wave tunability in 32nm CMOS SOI.
CICC
Mihai A. T. Sanduleanu, Alberto Valdes-Garcia, Y. Liu, Benjamin D. Parker, Shlomo Shlafman, Benny Sheinman, Danny Elad, Scott K. Reynolds, Daniel J. Friedman
2013 J jnl
A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Mark A. Ferriss, Arun Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li, Lawrence T. Pileggi, Ramesh Harjani, José A. Tierno, Daniel J. Friedman
2013 J jnl
Correction to "A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing".
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Mark A. Ferriss, Arun S. Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li, Lawrence T. Pillage, Ramesh Harjani, José A. Tierno, Daniel J. Friedman
2012 — conf
A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS.
CICC
Jean-Olivier Plouchart, Mark A. Ferriss, Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Lawrence T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
2012 — conf
A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS.
CICC
Jean-Olivier Plouchart, Mihai A. T. Sanduleanu, Zeynep Toprak Deniz, Troy J. Beukema, Scott K. Reynolds, Benjamin D. Parker, Michael P. Beakes, José A. Tierno, Daniel J. Friedman
2011 — conf
A 4GS/s, 8.45 ENOB and 5.7fJ/conversion, digital assisted, sampling system in 45nm CMOS SOI.
CICC
Mihai A. T. Sanduleanu, Scott K. Reynolds, Jean-Olivier Plouchart
2011 J jnl
A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications.
IEEE J. Solid State Circuits
Arun Natarajan, Scott K. Reynolds, Ming-Da Tsai, Sean T. Nicolson, Jing-Hong Conan Zhan, Dong Gun Kam, Duixian Liu, Yen-Lin Oscar Huang, Alberto Valdes-Garcia, Brian A. Floyd
2011 J jnl
Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications.
IEEE Commun. Mag.
Alberto Valdes-Garcia, Scott K. Reynolds, Arun Natarajan, Dong Gun Kam, Duixian Liu, Jie-Wei Lai, Yen-Lin Oscar Huang, Ping-yu Chen, Ming-Da Tsai, Jing-Hong Conan Zhan, Sean Nicolson, Brian A. Floyd
2010 J jnl
A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications.
IEEE J. Solid State Circuits
Alberto Valdes-Garcia, Sean T. Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Dong Gun Kam, Duixian Liu, Brian A. Floyd
2010 — conf
A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications.
ISSCC
Alberto Valdes-Garcia, Sean Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Brian A. Floyd
2008 A conf
Multi-Gbps wireless systems over 60-GHz SiGe radio link with BW-efficient noncoherent detections.
ICME
Yasunao Katayama, Daiju Nakano, Alberto Valdes-Garcia, Troy J. Beukema, Scott K. Reynolds
2007 — conf
2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio Link.
CCNC
Yasunao Katayama, Chuck Haymes, Daiju Nakano, Troy J. Beukema, Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Brian P. Gaucher, Kai Schleupen
2007 — conf
Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers.
CICC
Alberto Valdes-Garcia, Scott K. Reynolds, Troy J. Beukema
2006 J jnl
A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications.
IEEE J. Solid State Circuits
Scott K. Reynolds, Brian A. Floyd, Ullrich R. Pfeiffer, Troy J. Beukema, Janusz Grzyb, Chuck Haymes, Brian P. Gaucher, Mehmet Soyuer
2006 — conf
A silicon 60GHz receiver and transmitter chipset for broadband communications.
ISSCC
Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Troy J. Beukema, Janus Grzyb, Chuck Haymes
2005 J jnl
10+ gb/s 90-nm CMOS serial link demo in CBGA package.
IEEE J. Solid State Circuits
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
2005 J jnl
Design and Compliance Testing of a SiGe WCDMA Receiver IC With Integrated Analog Baseband.
Proc. IEEE
Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer
2005 Misc conf
On-Chip Spectrum Analyzer for Analog Built-In Self Test.
VTS
Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
2005 — conf
Progress toward a low-cost millimeter-wave silicon radio.
CICC
Scott K. Reynolds, Brian A. Floyd, Ullrich R. Pfeiffer, Troy J. Beukema, Thomas Zwick, Janus Grzyb, Duixian Liu, Brian P. Gaucher
2005 J jnl
SiGe bipolar transceiver circuits operating at 60 GHz.
IEEE J. Solid State Circuits
Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Thomas Zwick, Troy J. Beukema, Brian P. Gaucher
2005 — conf
SiGe transformer matched power amplifier for operation at millimeter-wave frequencies.
ESSCIRC
Ullrich R. Pfeiffer, David Goren, Brian A. Floyd, Scott K. Reynolds
2004 — conf
10+ Gb/s 90nm CMOS serial link demo in CBGA package.
CICC
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
2004 J jnl
A 60-GHz superheterodyne downconversion mixer in silicon-germanium bipolar technology.
IEEE J. Solid State Circuits
Scott K. Reynolds
2003 J jnl
A direct-conversion receiver IC for WCDMA mobile systems.
IEEE J. Solid State Circuits
Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer, Herschel A. Ainspan
2003 J jnl
A direct-conversion receiver integrated circuit for WCDMA mobile systems.
IBM J. Res. Dev.
Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer, Herschel A. Ainspan
2001 J jnl
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution.
IEEE J. Solid State Circuits
Peter H. Baechtold, Michael P. Beakes, Peter Buchmann, Rolf Clauberg, John F. Ewen, John F. Gilsdorf, Philippe Hauviller, Andreas Herkersdorf, Jean-Claude Le Garrec, Wolfram W. Lemppenau, Ben Parker, Dale J. Pearson, Joseph M. Pereira, Dominique Plassat, Scott K. Reynolds, Hans R. Schindler, André Steimle, David J. Webb, Albert X. Widmer
1997 J jnl
A DC-DC converter for short-channel CMOS technologies.
IEEE J. Solid State Circuits
Scott K. Reynolds
1997 A conf
Supply and threshold voltage optimization for low power design.
ISLPED
David J. Frank, Paul M. Solomon, Scott K. Reynolds, John Shin
1995 J jnl
Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications.
IBM J. Res. Dev.
Hyun J. Shin, Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner
1995 J jnl
Digital FIR filters for high speed PRML disk read channels.
IEEE J. Solid State Circuits
Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner, Michael Immediato, Richard L. Galbraith, Hyun J. Shin