Sayed Masoud Sayedi

36 papers Journal 27Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
Spintronic Content Addressable Memory With Integrated Boolean Logic and Arithmetic Functions.
IEEE Access
Zahra Mehdizadeh Taheri, Sayed Masoud Sayedi, Mohammad Hossein Moaiyeri
2023 J jnl
Hardware design and implementation of high-efficiency cube-root of complex numbers.
Microprocess. Microsystems
Elias Rajaby, Sayed Masoud Sayedi, Ehsan Yazdian
2022 J jnl
A structured review of sparse fast Fourier transform algorithms.
Digit. Signal Process.
Elias Rajaby, Sayed Masoud Sayedi
2018 J jnl
A Low-Complexity Hardware for Deterministic Compressive Sensing Reconstruction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mohammad Fardad, Sayed Masoud Sayedi, Ehsan Yazdian
2018 J jnl
Hardware Implementation of Iterative Method With Adaptive Thresholding for Random Sampling Recovery of Sparse Signals.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Fardad, Sayed Masoud Sayedi, Ehsan Yazdian
2018 J jnl
SystemC-AMS modeling of photodiode based on PWL technique to be used in energy harvesting CMOS image sensor.
Integr.
Mohammad Radpour, Sayed Masoud Sayedi
2017 J jnl
Color-based skin segmentation in videos using a multi-step spatial method.
Multim. Tools Appl.
Mohammad Reza Mahmoodi, Sayed Masoud Sayedi, Fariba Karimi
2017 J jnl
Efficient and low-complexity hardware architecture of Gaussian normal basis multiplication over GF(2
IET Circuits Devices Syst.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2017 J jnl
Full-custom hardware implementation of point multiplication on binary Edwards curves for application-specific integrated circuit elliptic curve cryptosystem applications.
IET Circuits Devices Syst.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2017 J jnl
High-performance and high-speed implementation of polynomial basis Itoh-Tsujii inversion algorithm over GF(2
IET Inf. Secur.
Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi
2017 J jnl
High-speed Hardware Implementations of Point Multiplication for Binary Edwards and Generalized Hessian Curves.
IACR Cryptol. ePrint Arch.
Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi
2016 J jnl
A low-power wide tuning-range CMOS current-controlled oscillator.
Integr.
Kourosh Hassanli, Sayed Masoud Sayedi, Rasoul Dehghani, Armin Jalili, J. Jacob Wikner
2016 J jnl
An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2
Integr.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2016 J jnl
Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2
IET Comput. Digit. Tech.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2016 J jnl
High-speed VLSI implementation of Digit-serial Gaussian normal basis Multiplication over GF(2m).
IACR Cryptol. ePrint Arch.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2016 J jnl
High-speed hardware architecture of scalar multiplication for binary elliptic curve cryptosystems.
Microelectron. J.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2015 J jnl
A face detection method based on kernel probability map.
Comput. Electr. Eng.
Mohammad Reza Mahmoodi, Sayed Masoud Sayedi
2015 J jnl
Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems.
IACR Cryptol. ePrint Arch.
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi
2015 J jnl
Efficient implementation of low time complexity and pipelined bit-parallel polynomial basis multiplier over binary finite fields.
ISC Int. J. Inf. Secur.
Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi
2014 J jnl
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm.
Microelectron. J.
Reza Rezaeian Farashahi, Bahram Rashidi, Sayed Masoud Sayedi
2014 — conf
High-speed and pipelined finite field bit-parallel multiplier over GF(2
ISCISC
Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi
2013 J jnl
Implementation of a low power 16-bit radix-4 pipelined SRT divider using a modified Split-Path Data Driven Dynamic Logic (SPD
Microelectron. J.
Shirin Pourashraf, Sayed Masoud Sayedi
2012 — conf
A low power D
CCECE
Shirin Pourashraf, Sayed Masoud Sayedi
2012 — conf
Design of a neuromorphic edge detector vision chip with color and intensity change disambiguation.
CCECE
Hesam Ahmadi, Sayed Masoud Sayedi
2012 — conf
Fault coverage improvement and test vector generation for combinational circuits using spectral analysis.
CCECE
Mehrnaz Ahmady, Sayed Masoud Sayedi
2011 J jnl
A nonlinearity error calibration technique for pipelined ADCs.
Integr.
Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner, Abolghasem Zeidaabadi Nezhad
2011 J jnl
Asynchronous demodulation technique for use in vision sensor image classification and segmentation.
Int. J. Circuit Theory Appl.
Mehdi Habibi, Sayed Masoud Sayedi
2011 J jnl
Inter-channel offset and gain mismatch correction for time-interleaved pipelined ADCs.
Microelectron. J.
Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner
2010 J jnl
Asynchronous demodulation CMOS sensor for object labeling and its application in robotics.
Ind. Robot
Mehdi Habibi, Sayed Masoud Sayedi
2010 — conf
Calibration of high-resolution flash ADCS based on histogram test methods.
ICECS
Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner, Kent Palmkvist, Mark Vesterbacka
2010 J jnl
Low-power dual-edge triggered state-retention scan flip-flop.
IET Comput. Digit. Tech.
Hossein Karimiyan, Sayed Masoud Sayedi, Hossein Saidi
2009 — conf
Low-Power Dual-Edge Triggered State Retention Scan Flip-Flop.
PATMOS
Hossein Karimiyan, Sayed Masoud Sayedi, Hossein Saidi
2008 J jnl
A 1.2 V current-mode true RMS-DC converter based on the floating gate MOS translinear principle.
Microelectron. J.
Ebrahim Farshidi, Sayed Masoud Sayedi
2008 — conf
A frequency based digital background calibration technique for pipelined ADCs.
ICECS
Armin Jalili, Sayed Masoud Sayedi, Rasoul Dehghani, Ebrahim Farshidi
2008 — conf
A nonlinearity error calibration technique based on an opamp distortion modeling.
APCCAS
Armin Jalili, Sayed Masoud Sayedi
2006 — conf
A Novel Digital Voltage Controller for Single-Phase PFC Rectifiers.
CCECE
Dawood Shekari Beyragh, Sayed Masoud Sayedi, Hamid Reza Karshenas