Satoshi Komatsu

53 papers A 6B 2C 6Journal 12Unranked 27

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	A Low Power ΔΣ Modulator with Low Voltage OTA for Wearable Applications. ICM Naoya Maruyama, Satoshi Komatsu
2023	—	`conf`	A PVT Variation Dependencies of VCO in Frequency Locked Loop. ICECS Kota Hara, Satoshi Komatsu
2018	—	`conf`	A Framework for Automatic Generation of Fully Synthesizable ADPLL. ICECS Shinya Ubukata, Satoshi Komatsu
2017	—	`conf`	A low-voltage hysteresis comparator for low power applications. ICECS Takumi Saito, Satoshi Komatsu
2017	—	`conf`	Characteristics optimization of stochastic ADC and its automatic generation system. NEWCAS Ryosuke Yumoto, Satoshi Komatsu
2016	—	`conf`	A comparative study of body biased time-to-digital converters based on stochastic arbiters and stochastic comparators. NEWCAS James S. Tandon, Satoshi Komatsu, Takahiro J. Yamaguchi, Kunihiro Asada
2016	J	`jnl`	Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing. J. Electron. Test. Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
2016	J	`jnl`	Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing. IEICE Trans. Electron. Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
2014	J	`jnl`	A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Satoshi Komatsu, Takahiro J. Yamaguchi, Mohamed Abbas, Nguyen Ngoc Mai Khanh, James S. Tandon, Kunihiro Asada
2014	—	`conf`	A Novel Circuit for Transition-Edge Detection: Using a Stochastic Comparator Group to Test Transition-Edge. ATS Takahiro J. Yamaguchi, James S. Tandon, Satoshi Komatsu, Kunihiro Asada
2014	J	`jnl`	A Structured Routing Architecture for Practical Application of Character Projection Method in Electron-Beam Direct Writing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
2014	C	`conf`	A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer. ISCAS James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada
2014	A	`conf`	Statistical silicon results of dynamic power integrity control of ATE for eliminating overkills and underkills. ITC Masahiro Ishida, Takashi Kusaka, Toru Nakura, Satoshi Komatsu, Kunihiro Asada
2013	A	`conf`	A novel test structure for measuring the threshold voltage variance in MOSFETs. ITC Takahiro J. Yamaguchi, James S. Tandon, Satoshi Komatsu, Kunihiro Asada
2013	—	`conf`	A stochastic sampling time-to-digital converter with tunable 180-770fs resolution, INL less than 0.6LSB, and selectable dynamic range offset. CICC James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada
2013	—	`conf`	A structured routing architecture and its design methodology suitable for high-throughput electron beam direct writing with character projection. ISPD Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
2013	J	`jnl`	High-Throughput Electron Beam Direct Writing of VIA Layers by Character Projection with One-Dimensional VIA Characters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
2013	—	`conf`	High-throughput electron beam direct writing of VIA layers by character projection using character sets based on one-dimensional VIA arrays with area-efficient stencil design. ASP-DAC Rimon Ikeno, Takashi Maruyama, Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada
2012	—	`conf`	A New Procedure for Measuring High-Accuracy Probability Density Functions. Asian Test Symposium Takahiro J. Yamaguchi, Kunihiro Asada, Kiichi Niitsu, Mohamed Abbas, Satoshi Komatsu, Haruo Kobayashi, Jose A. Moreira
2012	A	`conf`	Power integrity control of ATE for emulating power supply fluctuations on customer environment. ITC Masahiro Ishida, Toru Nakura, Toshiyuki Kikkawa, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
2011	C	`conf`	An equivalent-time and clocked approach for continuous-time quantization. ISCAS Takahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada
2011	A	`conf`	Application of a continuous-time level crossing quantization method for timing noise measurements. ITC Takahiro J. Yamaguchi, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Kunihiro Asada, Mohamed Abbas, Satoshi Komatsu
2011	—	`conf`	Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology. ICECS Mohamed Abbas, Takahiro J. Yamaguchi, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada
2010	A	`conf`	An automatic test generation framework for digitally-assisted adaptive equalizers in high-speed serial links. DATE Mohamed Abbas, Kwang-Ting Cheng, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada
2009	J	`jnl`	Interconnect-Aware Pipeline Synthesis for Array-Based Architectures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shanghua Gao, Hiroaki Yoshida, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
2009	—	`conf`	SAT-based ATPG testing of inter- and intra-gate bridging faults. ECCTD Toru Nakura, Yutaro Tatemura, Görschwin Fey, Makoto Ikeda, Satoshi Komatsu, Kunihiro Asada
2009	B	`conf`	Signature-Based Testing for Digitally-Assisted Adaptive Equalizers in High-Speed Serial Links. ETS Mohamed Abbas, Kwang-Ting Cheng, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada
2008	—	`conf`	Targeting Leakage Constraints during ATPG. ATS Görschwin Fey, Satoshi Komatsu, Yasuo Furukawa, Masahiro Fujita
2008	A	`conf`	VLSI Test Exercise Courses for Students in EE Department. ITC Satoshi Komatsu
2007	—	`conf`	Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures. IESS Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
2007	—	`conf`	Protocol Transducer Synthesis using Divide and Conquer approach. ASP-DAC Shigeru Watanabe, Kenshu Seto, Yuji Ishikawa, Satoshi Komatsu, Masahiro Fujita
2007	B	`conf`	Using Counterexample Analysis to Minimize the Number of Predicates for Predicate Abstraction. ATVA Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2007	—	`conf`	VLSI CAD Education and Exercise Course with Public Domain Tools. MSE Satoshi Komatsu, Kazuyoshi Takagi, Masahiro Fujita, Kunihiro Asada
2006	C	`conf`	An optimization of bus interconnects pitch for low-power and reliable bus encoding scheme. ISCAS Satoshi Komatsu, Masahiro Fujita
2006	—	`conf`	Dynamically reconfigurable protocol transducer. FPT Shota Watanabe, Yuji Ishikawa, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
2006	J	`jnl`	Synchronization Mechanism for Timed/Untimed Mixed-Signal System Level Design Environment. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yu Liu, Satoshi Komatsu, Masahiro Fujita
2006	J	`jnl`	Synchronization Verification in System-Level Design with ILP Solvers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2006	J	`jnl`	The AMS Extension to System Level Design Language - SpecC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yu Liu, Satoshi Komatsu, Masahiro Fujita
2005	C	`conf`	AMS Extensions for Timed/Untimed System-Level Design Language. FDL Yu Liu, Satoshi Komatsu, Masahiro Fujita
2005	J	`jnl`	Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Satoshi Komatsu, Masahiro Fujita
2005	—	`conf`	Pipeline Scheduling for Array Based Reconfigurable Architectures Considering Interconnect Delays. FPT Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
2005	C	`conf`	Synchronization verification in system-level design with ILP solvers. MEMOCODE Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2005	—	`conf`	System level design language extensions for timed/untimed digital-analog combined system design. ACM Great Lakes Symposium on VLSI Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2003	—	`conf`	Comparative Study On Verilog-Based And C-Based Hardware Design Education. MSE Tohru Ishihara, Satoshi Komatsu, Makoto Ikeda, Masahiro Fujita, Kunihiro Asada
2003	C	`conf`	Engineering Changes in Field Modifiable Architectures. MEMOCODE Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita
2003	—	`conf`	Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies. HICSS Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, Kenshu Seto, Thanyapat Sakunkonchak, Yoshihisa Kojima
2003	J	`jnl`	Irredundant Low Power Address Bus Encoding Techniques Based on Adaptive Codebooks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Satoshi Komatsu, Masahiro Fujita
2003	—	`conf`	Irredundant address bus encoding techniques based on adaptive codebooks for low power. ASP-DAC Satoshi Komatsu, Masahiro Fujita
2003	J	`jnl`	Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2002	—	`conf`	Field Modifiable Architecture and its Design Methodology: System Design Without Logic Synthesis. IWLS Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
2002	—	`conf`	Field modifiable architecture with FPGAs and its design methodology. FPT Satoshi Komatsu, Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto, Masahiro Fujita
1999	—	`conf`	Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method. Great Lakes Symposium on VLSI Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada
1998	—	`conf`	Low Power Micoprocessors for Comparative Study on Bus Architecture and Multiplexer Architecture. ASP-DAC Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada