Saravana Manivannan

13 papers C 3Journal 7Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
Identifying Design Challenges in Analog Circuits Due to Device Nonidealities at Cryogenic Temperatures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mohit Shukla, Sovan Kumar Dey, Avirup Dasgupta, Saravana Manivannan
2024 C conf
A Chopper-Stabilized Bandgap Reference with a Double-Sampled FIR Filter in 180-nm CMOS.
ISCAS
Snehalatha Lalithamma, Saravana Manivannan
2024 J jnl
Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining.
IEEE J. Solid State Circuits
Shanthi Pavan, Saravana Manivannan, Nishanth Basavaraj
2024 — conf
Analysis of Device Noise in Bandgap Reference Voltage Generators.
VDAT
Snehalatha Lalithamma, Saravana Manivannan, Uddipan Agasti
2023 — conf
Analysis of Switched-RC N-path filters with Finite Switch Resistance and Switched $G_{m}-C$ filters using the Adjoint Network.
APCCAS
Endersh Soni, Saravana Manivannan
2022 C conf
Analysis of Flash ADC Loading on the Performance of a Continuous-Time Pipelined ADC.
ISCAS
Chaitanya Kumar, Saravana Manivannan, Shanthi Pavan
2022 J jnl
Analysis of RC Time-Constant Variations in Continuous-Time Pipelined ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shanthi Pavan, Saravana Manivannan
2022 J jnl
Improved Multistage Continuous-Time Pipelined Analog-to-Digital Converters and the Implicit Decimation Property.
IEEE Trans. Circuits Syst. I Regul. Pap.
Saravana Manivannan, Shanthi Pavan
2022 J jnl
Simplified Simulation and Measurement of the Signal Transfer Function of a Continuous-Time Pipelined Analog-to-Digital Converter.
IEEE Trans. Circuits Syst. II Express Briefs
Nishanth Basavaraj, Saravana Manivannan, Shanthi Pavan
2020 J jnl
Improved Continuous-Time Delta-Sigma Modulators With Embedded Active Filtering.
IEEE Trans. Circuits Syst.
Saravana Manivannan, Shanthi Pavan
2019 C conf
Degradation of Alias Rejection in Continuous-Time Bandpass Delta-Sigma Converters due to Weak Loop Filter Nonlinearities.
ISCAS
Saravana Manivannan, Shanthi Pavan
2018 — conf
A 1 MHz bandwidth, filtering continuous-time delta-sigma ADC with 36 dBFS out-of-band IIP3 and 76 dB SNDR.
CICC
Saravana Manivannan, Shanthi Pavan
2018 J jnl
Degradation of Alias Rejection in Continuous-Time Delta-Sigma Modulators by Weak Loop-Filter Nonlinearities.
IEEE Trans. Circuits Syst. I Regul. Pap.
Saravana Manivannan, Shanthi Pavan